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Can the AM5K2E02 EMIF16 interface do DMA access?

Other Parts Discussed in Thread: AM5K2E02

Does the AM5K2E processors support EMIF16 DMA access?  The datasheet and application notes are ambiguous about this in regards to the AM5K2E Cortex A15 family.  We currently use the AM335x family in our product family.  We use the EMIF16 of the AM335x to use as a local bus that has the address/data pins and then use DMA access over this bus.  

I'm looking into the AM5K2E02 to communicate over PCIe x2 and also via local bus via EMIF16 and I need DMA access over the EMIF16.  Without it...it'll be extremely slow.  Datasheet then mentions about EDMA but again is unclear whether this will be used over the EMIF16 interface.

So please provide documentation how the AM5K2E02 can do DMA or EDMA access through the EMIF16 local bus?

The other question is the  synchronous clock of EMIF16 interface on the AM335x was not constant...it would provide a clock cycle and then go low for a period at a time.  Will the EMIF16 interface of the AM5K2E02 be the same or will the synchronous clock be constant so we can use this clock and connect it to a PLL?  These non repeating clocks on the EMIF16 interface draws a big limitation when trying to use PLLs.

  • Moving this to the Keystone forum.
  • Hi James,

    The EMIF16 on the AM5K2E02 does support EDMA and there should be examples in the latest release of MCSDK. The EMIF16 interface is designed for asynchronous memory accesses and does not have a synchronous clock as found in the AM335x. There are limitations to the throughput of that interface. These have been discussed in numerous E2E posts for the KeyStone and KeyStone II devices. If you have throughput requirements for the interface, I suggest you review those posts. 

    Regards,

    Bill

  • I want to connect a local bus from the EMIF16 bus to the FPGA.  Any suggestion how how to get DMA access from the AM5K2E02 to the FPGA other than using PCIe?  Seems like a major limitation designing in such an impressive part like the AM5K2E02 and not provide some synchronous access and do DMA.

  • Hi James,
    The EMIF16 interface does support DMA but it doesn't support synchronous transfers. DMA does not require the use of synchronous accesses. You can setup a DMA transfer to your FPGA and program the setup, strobe and hold times associated with the access. The DMA will present each of the accesses to the FPGA until the transfer is complete but there may be gaps between accesses which can't be controlled. Your FPGA will have to be programmed to read the accesses as an asynchronous transfer. This usually forces each access to be programmed to be a little longer. If your applications can operate with the available throughput and with the gaps between accesses, the EMIF16 will work as a transfer method. If your applications requires higher throughput, you will have to use one of the serdes based interfaces such as PCIE or SRIO.
    Regards,
    Bill