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How to get best accuracy from AM437x ADC?

Brian Hook
Prodigy 90 points

Hello all,

I'm trying to maximize the DC accuracy (and ideally noise immunity) for signals read by the AM437x's internal ADCs. My intention was to use an external high accuracy voltage reference, but I've run into a couple of limitations, and I'm wondering if there's any app note on how to make the most of this ADC. [the limitations listed below are from Table 5-5 from the datasheet (rev April 2015)]

Limitation #1: VREFP can't be higher than VDDA_ADC0 (1.8V). For the best noise margin, I'd be inclined to use the full 1.8V for the reference. But if I use a separate 1.8V reference, it may deviate from VDDA_ADC0's 1.8V supply and end up violating Limitation #1. The IDK schematic has VDDA_ADC0 doing double-duty as both supply and reference, but this drags the DC conversion accuracy to the level of the supply's regulation. Is there really no leeway between the upper end of VREFP and the VDDA_ADC0 supply? I suppose one could tweak the 1.8V supply upwards, to be out of range of the external reference's error, but still within VDDA_ADC0 supply requirements, but that seems kludgy.

Limitation #2: ADC0_VREFP + ADC0_VREFN = VDDA_ADC0. Another post on E2E talked about this a bit, that the measurement range must always be centered around 1/2 of VDDA_ADC0. This precludes the use of a single reference of less than 1.8V, right? Is this the case even when using single-ended signals (differential bias voltage turned off)?

Are there any application notes or best practices established for getting the best accuracy from these converters (both ADC0 and ADC1)?

Thank you,
Brian

  • 0
    TI__Guru**** 393215 points
    Hi Brian,

    I will forward this to an ADC expert to comment.
  • 0 in reply to Biser Gatchev-XID
    TI__Expert 7570 points

    Hello Brian

    The use of a low noise external reference VREFP and VREFN can provide superior performance. The ADC can provide 70 dB SNR when operated in single ended configuration and 74 dB in differential configuration.  It is important to mention that a differential configuration will achieve improved performance only with close matching of the differential input components and signal routing. When this is not possible, a single ended configuration can provide the best solution. 

    There are ESD protection diodes between VREFP and VDDA_ADC0 and VREFN and VSSA_ADC0.  Conduction starts to occur when VREFP is higher than VDDA_ADC0 and when VREFN is lower than VSSA_ADC0.  As long as VREFP is less than VDDA_ADC0+100 mV and VREFN is greater than VSSA_ADC0-100 mV, the ADC operation should not be significantly unaffected. 

    The VREFP + VREFN = VDDA  means that the external reference common mode (CM)  needs to be the same as the ADC supply.  The common mode is (VREFP + VREFN)/2.  In this case, a difference between the external supply common mode and the ADC supply common mode of less than 200 mV should not significantly affect ADC operation.

    David

  • 0 in reply to David Zaucha
    Prodigy 90 points

    Hi David,

    Thank you for your response.  So, it sounds like limitation #2 should still be respected, and dictates that, when tying VREFN to ground, a maximum of ~1.4V should be used for VREFP.  But limitation #1 does not restrict me from using separate 1.8V reference, so long as I keep supply and reference within ~100mV of one another.  Thank you for the clarification.  This helps simplify things

    Brian