We have connected the LCD 24 Data lines and the control signals(vsync, hsync, pclock, de) to the SN65LVDS93ADGG as per the format2 in the attached document. we have done the following changes in the dts file and kernel configuration. we tested the pixel clock and it is not generating.
medha@C528:~/ti-glsdk_dra7xx-evm_7_02_00_02/board-support/linux$ git diff
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index f3c7631..d19b5c2 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -126,10 +126,26 @@
};
aliases {
- display0 = &hdmi0;
+ display0 = &lcd0;
sound0 = &primary_sound;
sound1 = &hdmi;
};
+
+ lcd0: panel {
+ compatible = "omapdss,nec,nl8048hl11";
+
+ status = "okay";
+ port{
+ lcd_in: endpoint {
+ remote-endpoint = <&dpi_out>;
+ };
+ };
+
+
+ };
+
+
+
+
+ vout1_pins: pinmux_vout1_pins {
+ pinctrl-single,pins = <
+ 0x1C8 (PIN_OUTPUT | MUX_MODE0) /* vout1_clk */
+ 0x1CC (PIN_OUTPUT | MUX_MODE0) /* vout1_de */
+ 0x1D0 (PIN_OUTPUT | MUX_MODE0) /* vout1_fld */
+ 0x1D4 (PIN_OUTPUT | MUX_MODE0) /* vout1_hsync */
+ 0x1D8 (PIN_OUTPUT | MUX_MODE0) /* vout1_vsync */
+ 0x1DC (PIN_OUTPUT | MUX_MODE0) /* vout1_d0 */
+ 0x1E0 (PIN_OUTPUT | MUX_MODE0) /* vout1_d1 */
+ 0x1E4 (PIN_OUTPUT | MUX_MODE0) /* vout1_d2 */
+ 0x1E8 (PIN_OUTPUT | MUX_MODE0) /* vout1_d3 */
+ 0x1EC (PIN_OUTPUT | MUX_MODE0) /* vout1_d4 */
+ 0x1F0 (PIN_OUTPUT | MUX_MODE0) /* vout1_d5 */
+ 0x1F4 (PIN_OUTPUT | MUX_MODE0) /* vout1_d6 */
+ 0x1F8 (PIN_OUTPUT | MUX_MODE0) /* vout1_d7 */
+ 0x1FC (PIN_OUTPUT | MUX_MODE0) /* vout1_d8 */
+ 0x200 (PIN_OUTPUT | MUX_MODE0) /* vout1_d9 */
+ 0x204 (PIN_OUTPUT | MUX_MODE0) /* vout1_d10 */
+ 0x208 (PIN_OUTPUT | MUX_MODE0) /* vout1_d11 */
+ 0x20C (PIN_OUTPUT | MUX_MODE0) /* vout1_d12 */
+ 0x210 (PIN_OUTPUT | MUX_MODE0) /* vout1_d13 */
+ 0x214 (PIN_OUTPUT | MUX_MODE0) /* vout1_d14 */
+ 0x218 (PIN_OUTPUT | MUX_MODE0) /* vout1_d15 */
+ 0x21C (PIN_OUTPUT | MUX_MODE0) /* vout1_d16 */
+ 0x220 (PIN_OUTPUT | MUX_MODE0) /* vout1_d17 */
+ 0x224 (PIN_OUTPUT | MUX_MODE0) /* vout1_d18 */
+ 0x228 (PIN_OUTPUT | MUX_MODE0) /* vout1_d19 */
+ 0x22C (PIN_OUTPUT | MUX_MODE0) /* vout1_d20 */
+ 0x230 (PIN_OUTPUT | MUX_MODE0) /* vout1_d21 */
+ 0x234 (PIN_OUTPUT | MUX_MODE0) /* vout1_d22 */
+ 0x238 (PIN_OUTPUT | MUX_MODE0) /* vout1_d23 */
+ >;
+ };
&dss {
- status = "ok";
-
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vout1_pins>;
vdda_video-supply = <&ldoln_reg>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ reg = <0>;
+
+ dpi_out: endpoint {
+ remote-endpoint = <&lcd_in>;
+ data-lines = <24>;
+ };
+ };
+ };
+
+
};
diff --git a/arch/arm/boot/dts/dra7xx-evm-lcd10.dtsi b/arch/arm/boot/dts/dra7xx-evm-lcd10.dtsi
index d00b29b..e9f7115 100644
--- a/arch/arm/boot/dts/dra7xx-evm-lcd10.dtsi
+++ b/arch/arm/boot/dts/dra7xx-evm-lcd10.dtsi
@@ -8,56 +8,37 @@
/ {
aliases {
- display0 = &tlc59108;
display1 = &hdmi0;
+
};
+
};
-&i2c1 {
- /* TLC chip for LCD panel power and backlight */
- tlc59108: tlc59108@40 {
- compatible = "ti,tlc59108-lp101";
- reg = <0x40>;
- enable-gpios = <&pcf_lcd 13 GPIO_ACTIVE_LOW>; /* P15, CON_LCD_PWR_DN */
- port {
- tlc_in: endpoint {
- remote-endpoint = <&dpi_out>;
- };
- };
- };
+&dss {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- ldc3001:ldc3001@18 {
- compatible = "lgphilips,ldc3001";
+ };
+};
-};
diff --git a/arch/arm/boot/dts/dra7xx-evm-lcd7.dtsi b/arch/arm/boot/dts/dra7xx-evm-lcd7.dtsi
index 34bf00b..a32c300 100644
--- a/arch/arm/boot/dts/dra7xx-evm-lcd7.dtsi
+++ b/arch/arm/boot/dts/dra7xx-evm-lcd7.dtsi
@@ -8,13 +8,13 @@
#include "dra7xx-evm-lcd10.dtsi"
-&tlc59108 {
+/*&tlc59108 {
compatible = "ti,tlc59108-tfcs9700";
};
&ldc3001 {
status = "disabled";
-};
+};*/
diff --git a/ti_config_fragments/wlan.cfg b/ti_config_fragments/wlan.cfg
index b936186..828198a 100644
--- a/ti_config_fragments/wlan.cfg
+++ b/ti_config_fragments/wlan.cfg
@@ -18,3 +18,7 @@ CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_GCM=y
+CONFIG_SMP=n
+CONFIG_BT=n
+CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=y
+
In kernel we have selected NEC_NL8048HL11 driver.
Note: KIndly suggest to drive just LCD Bus. At present i am not interfacing the touch panel and backlight control. I want just LCD signals to be generated with pixel clock.
Thanks & Regards,
N.V.Subbaiah
