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Keystone II arm generic timer

Bertrand Marquis
Prodigy 40 points

We are porting an hypervisor on a Keystone II board (XTCIEVMK2X) and arm generic timer registers are not possible to modify (virtual or physical).

We can read the counter and it is counting and we executed the boot monitor before executing our code.

Could you explain what needs to be done to make those registers writeable ? same low level init code is working on an omap5 where no clock or anything else needs to be done to use arm generic timers.

Thanks for your help

 

  • 0
    TI__Guru* 81335 points

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

  • 0 in reply to Raja
    TI__Guru 50170 points

    Hi, Bertrand,

    In Keystone-2, some Cortex-A15 configurations need to be performed in Supervisor mode in the secure state which is what boot monitor is doing. Boot Monitor is part of the boot process which switches to the secure supervisor mode, configures A15, and then out of secure supervisor mode. This is through SMC instruction. Please refer to ARM Cortex-A15 TRM for details.

    I am not familiar with how OMAP5 works. It's different design. I'll see if I can get its info.

    Rex

  • 0 in reply to Rex Chang
    Prodigy 40 points

    Hi Rex,

    We found out that the timer registers are actually possible to modify and the "read" function we were using was actually the bug.

    Thanks anyway for your help

    Bertrand

  • 0 in reply to Bertrand Marquis
    TI__Guru* 81335 points
    Bertrand,
    Thank you for the update.