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PCIe outbound translation regions

Hi,

I have a doubt about the number of outbound translation regions in the PCIe peripheral on the C6657.

I need 16 regions 8MB long to map a contiguos 128MB address space and another region to map another 8MB address space.

From the datasheet it's written there are 32 regions, but when I look at the PDK file cslr_pciess_app.h there are only 8 regions mapped (CSL_Pciess_appOutbound_translationRegs OUTBOUND_TRANSLATION[8]).

What's the explanation?

 

Thanks,

Luca

  • Luca,

    The PCIESS has 32 outbound translation region, the first pair starts at offset 0x200 and 0x204, .... so the last pair ends at 0x2F8 and 0x2FC. Starting from offset 0x300, this is for inbound translation.

    I don't understand why CSL code limit the OB pairs to 8, then padding the rest with RSVD:

        CSL_Pciess_appOutbound_translationRegs OUTBOUND_TRANSLATION[8];
        volatile Uint8 RSVD7[192];

    This is a problem in our CSL code and I will open a ticket. Thanks for the note!

    Regards, Eric