TI SDSPI_open forcing sysbios exit

Hi Jonathan,

I am wondering if the system stack is not sufficient. Hwi module uses the system stack. In case of IAR EWARM, the system stack is set in the linker cmd file. Can you check the value?

Also, a good way to debug Hwi exceptions is to look at the "Hwi > Exception" view in ROV. This provides a call stack which is useful in debugging.

Vikram

Hi Vikram,

Thanks for getting back to me. I have looked at and tried adjusting the stack in the linker file (CSTACK variable) from 0x300 to 0x600. Doing this, I still see an error occurring. I have uploaded an image showing the error. 

Regards,

Jonathan

Vikram,

While tinkering with task and system stack sizes, I obtained the error shown below. Perhaps this provides more detail. This is with a task stack size of 1024B and a CSTACK size of 768B (0x300).

If there are any other error or status windows you would like me to investigate please let me know, I am unfamiliar with TI RTOS and still learning the debug environment. 

Thanks,

Jonathan,

A common cause of HWI exception is low stack. If that's not that cause then I may need to look at your cfg and see if there is anything missing. Can you please share your application's .cfg file? Your C code looked fine.

Also, which versions of TI-RTOS and IAR EWARM are you using?

Vikram

Vikram,

I have included the initialization code. According to my .map file I am using about 30k of RAM so far, and there is still a bit of room left on the heap (~0xdc0) when everything is running, so if I need to play with any stack sizes I can make adjustments within that range. I have been playing around most of the morning with increasing the log task and CSTACK sizes but have not met with any success.

The EWARM version I am using is 7.40.3.8938.

The TIRTOS version is tivac_2_14_00_10.

IAR Linker .icf file:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__   = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__   = 0x20007FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x0600;
define symbol __ICFEDIT_size_heap__   = 0x0000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };

TI RTOS cfg file:

/*
 * Copyright (c) 2015, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ======== VL01_project.cfg ========
 */

/* ================ General configuration ================ */
var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Log = xdc.useModule('xdc.runtime.Log');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory');
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');

var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var Timer = xdc.useModule('ti.sysbios.family.arm.lm4.Timer');

/*
 *  Program.stack is ignored with IAR. Use the project options in
 *  IAR Embedded Workbench to alter the system stack size.
 */
if (!Program.build.target.$name.match(/iar/)) {
    /*
     *  Reducing the system stack size (used by ISRs and Swis) to reduce
     *  RAM usage.
     */
    Program.stack = 0x0300;
}

Text.isLoaded = true;   /* Do not load abort text strings etc. on final application to preserve memory */

/* ================ System configuration ================ */
var SysMin = xdc.useModule('xdc.runtime.SysMin');
System.SupportProxy = SysMin;

/* Enable Semihosting for GNU targets to print to CCS console */
if (Program.build.target.$name.match(/gnu/)) {
    var SemiHost = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
}

/* ================ Logging configuration ================ */
var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup');
LoggingSetup.mainLogging = true;


/* ================ Kernel configuration ================ */
/* Use Custom library */
var BIOS = xdc.useModule('ti.sysbios.BIOS');
BIOS.libType = BIOS.LibType_Custom;
BIOS.logsEnabled = true;
BIOS.assertsEnabled = true;
BIOS.swiEnabled = true;
BIOS.heapSize = 0x2000;

/* Runtime stack checking is performed */
Task.checkStackFlag = true;
Hwi.checkStackFlag = true;

/* ================ Task configuration ================ */
/* Idle Task */
var IdleTaskParameters = new Task.Params();
IdleTaskParameters.instance.name = "IdleTask";
IdleTaskParameters.arg0 = 1000;
IdleTaskParameters.priority = 2;
IdleTaskParameters.stackSize = 500;
Program.global.heartBeatTask = Task.create("&vIdleTask", IdleTaskParameters);

/* CTL Task */
 var CTLTaskParameters = new Task.Params();
  CTLTaskParameters.instance.name = "CTLTask";
  CTLTaskParameters.arg0 = 0;
  CTLTaskParameters.arg1 = 0;
  CTLTaskParameters.priority = 8;
  CTLTaskParameters.stackSize = 1024;
  Task.create('&CTL_vCTLTask', CTLTaskParameters); 
  
/* DIS Task */
 var DISTaskParameters = new Task.Params();
  DISTaskParameters.instance.name = "DISTask";
  DISTaskParameters.arg0 = 0;
  DISTaskParameters.arg1 = 0;
  DISTaskParameters.priority = 7;
  DISTaskParameters.stackSize = 1024;
  Task.create('&DIS_vDISTask', DISTaskParameters); 
  
/* MEM Task */
 var MEMTaskParameters = new Task.Params();
  MEMTaskParameters.instance.name = "MEMTask";
  MEMTaskParameters.arg0 = 0;
  MEMTaskParameters.arg1 = 0;
  MEMTaskParameters.priority = 7;
  MEMTaskParameters.stackSize = 768;
  Task.create('&MEM_vMEMTask', MEMTaskParameters); 
  
/* MON Task */
 var MONTaskParameters = new Task.Params();
  MONTaskParameters.instance.name = "MONTask";
  MONTaskParameters.arg0 = 0;
  MONTaskParameters.arg1 = 0;
  MONTaskParameters.priority = 7;
  MONTaskParameters.stackSize = 768;
  Task.create('&MON_vMONTask', MONTaskParameters);
  
/* NOTE: The USB (3 tasks), MFE and LOG tasks are created dynamically by the control module
    on system startup. */
/* ================ Driver configuration ================ */
var TIRTOS = xdc.useModule('ti.tirtos.TIRTOS');
var FatFs = xdc.useModule('ti.sysbios.fatfs.FatFS');
TIRTOS.useGPIO = true;
TIRTOS.useSDSPI = true;
TIRTOS.useSPI = true;
TIRTOS.useWatchdog = true;

Here is the initializer for the LOG task which calls the SD open function:

#define LOG_TASK_STACKSIZE      1024;
#define LOG_TASK_PRIORITY       7;

/*
*  ======== vCreateLOGTask ========
*  Detail: Creates the logging task that is responsible for writes to the SD card. This is called after SYSBIOS is running.
*/
static void vCreateLOGTask(void)
{
  Task_Params   sLOGTaskParameters;
  Task_Handle   hLOGTask;
  Error_Block   sErrorBlock;
  
  Error_init(&sErrorBlock);
  Task_Params_init(&sLOGTaskParameters);
  sLOGTaskParameters.stackSize = LOG_TASK_STACKSIZE;
  sLOGTaskParameters.priority = LOG_TASK_PRIORITY;
  hLOGTask = Task_create(&LOG_vLOGTask, &sLOGTaskParameters, &sErrorBlock);
  if(hLOGTask == NULL)
  {
    System_abort("LOG Task Creation Failure");
  }
}

I see that you are using both SDSPI and SPI drivers in your application. What pins are your SPI configured to?

Currently the SPI code (init and all calls to SPI drivers) are commented out while I debug this issue, but here is the initialization:

Whether I enable or disable the call to initSPI and initDMA before I start sys_bios doesn't seem to have any effect on the issue.

Board header:

typedef enum VL01_SPIName {
    VL01_SPI1 = 0,
    VL01_SPI2,
    
    VL01_SPICOUNT
} VL01_SPIName;

Board initialization source:

/*
 *  =============================== SPI ===============================
 */
/* Place into subsections to allow the TI linker to remove items properly */
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(SPI_config, ".const:SPI_config")
#pragma DATA_SECTION(spiTivaDMAHWAttrs, ".const:spiTivaDMAHWAttrs")
#endif

#include <ti/drivers/SPI.h>
#include <ti/drivers/spi/SPITivaDMA.h>

/* SPI objects */
SPITivaDMA_Object spiTivaDMAObjects[VL01_SPICOUNT];
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_ALIGN(spiTivaDMAscratchBuf, 32)
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma data_alignment=32
#elif defined(__GNUC__)
__attribute__ ((aligned (32)))
#endif
uint32_t spiTivaDMAscratchBuf[VL01_SPICOUNT];

/* SPI configuration structure */
const SPITivaDMA_HWAttrs spiTivaDMAHWAttrs[VL01_SPICOUNT] = {
    {
        SSI1_BASE,
        INT_SSI1,
        ~0,         /* Interrupt priority */
        &spiTivaDMAscratchBuf[0],
        0,
        UDMA_SEC_CHANNEL_SSI1RX, 
        UDMA_SEC_CHANNEL_SSI1TX,
        uDMAChannelAssign,
        UDMA_SEC_CHANNEL_SSI1RX,
        UDMA_SEC_CHANNEL_SSI1TX
    },
    {
        SSI2_BASE,
        INT_SSI2,
        ~0,         /* Interrupt priority */
        &spiTivaDMAscratchBuf[1],
        0,
        UDMA_SEC_CHANNEL_UART2RX_12, 
        UDMA_SEC_CHANNEL_UART2TX_13,
        uDMAChannelAssign,
        UDMA_CH12_SSI2RX,
        UDMA_CH13_SSI2TX
    }
};

const SPI_Config SPI_config[] = {
    {&SPITivaDMA_fxnTable, &spiTivaDMAObjects[0], &spiTivaDMAHWAttrs[0]},
    {&SPITivaDMA_fxnTable, &spiTivaDMAObjects[1], &spiTivaDMAHWAttrs[1]},
    {NULL, NULL, NULL},
};

/*
 *  ======== VL01_initSPI ========
 */
void VL01_initSPI(void)
{
    /* SSI2  - Used by ADE */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);

    GPIOPinConfigure(GPIO_PD0_SSI1CLK);
    GPIOPinConfigure(GPIO_PD1_SSI1FSS); 
    GPIOPinConfigure(GPIO_PD2_SSI1RX);
    GPIOPinConfigure(GPIO_PD3_SSI1TX);

    GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | //CS disabled
                                    GPIO_PIN_2 | GPIO_PIN_3);
    
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);

    GPIOPinConfigure(GPIO_PB4_SSI2CLK);
    //GPIOPinConfigure(GPIO_PB5_SSI2FSS); //Do not configure the CS, this is handled at the ADE driver layer
    GPIOPinConfigure(GPIO_PB6_SSI2RX);
    GPIOPinConfigure(GPIO_PB7_SSI2TX);

    GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | //GPIO_PIN_5 | //CS disabled
                                    GPIO_PIN_6 | GPIO_PIN_7);

    VL01_initDMA();
    SPI_init();
}

Here is the startup code:
int main(void)
{
    /* Call board init functions */
  VL01_initGeneral();
  VL01_initGPIO();
  //VL01_initDMA();
  //VL01_initSPI();
  VL01_initSDSPI();
  VL01_initUSB(VL01_USBDEVICE);
  VL01_initEEPROM();
  VL01_initWatchdog();
  System_printf("OS Boot Started\n");
    /* SysMin will only print to the console when you call flush or exit */
  System_flush();

    /* Start BIOS */

  BIOS_start();

  return (0);
}

Vikram,

I have made some progress. I changed the SSI module from SSI1 over to SSI3 and it gets past the SD_open call and returns a valid handle now. However, when calling fopen I get a FR_NOT_READY status return. There is a possibility that there could a wiring issue or similar on the board, and I noticed in the TI documentation that apparently there is a way to get the SDSDPI module/card status with the ROV tool, but I am having trouble finding this. In the ROV, I see only a basic and raw tab for the SDSPI and the basic tab doesn't appear to contain any relevant information beside the handle.

Is there any way to view the initialization status of the SDSPI module?

Thanks,

Jonathan,

We just have the basic view for SDSPI module in ROV. I hope that you updated the VL01_initSDSPI() to initialize SSI3 when you changed from SSI1 over to SSI3. One way that I  cansuggest to look at the initialization status is to look at the  sdspiTivaObjects object in memory browser.  The object is of type SDSPITiva_Object:

typedef struct SDSPITiva_Object {
    uint32_t            driveNumber;   /*!< Drive number used by FatFs */
    DSTATUS             diskState;     /*!< Disk status */
    SDSPITiva_CardType  cardType;      /*!< SDCard Card Command Class (CCC) */
    uint32_t            bitRate;       /*!< SPI bus bit rate (Hz) */
    FATFS               filesystem;    /*!< FATFS data object */
} SDSPITiva_Object, *SDSPITiva_Handle;

Looking through the fields especially diskState can provide you some info.

Also, I would like to know which version of TI-RTOS are you using? Is your code based of an example of that particular TI-RTOS version? The HwAttrs in the board files have undergone revisions in TI-RTOS. So there may be chance that the HwAttrs you defined may not be in sync with the HwAttrs that the driver is expecting.

Vikram

Hi Vikram,

The TIRTOS version is tivac_2_14_00_10.

I have adjusted the initializion and it currently looks as shown here. I tried to follow as closely as possible the examples included in the TI rtos folder, so if some are slightly out of date this could certainly be causing an issue. My SDSPI init looks like this:

*
 *  =============================== SDSPI ===============================
 */
/* Place into subsections to allow the TI linker to remove items properly */
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(SDSPI_config, ".const:SDSPI_config")
#pragma DATA_SECTION(sdspiTivaHWattrs, ".const:sdspiTivaHWattrs")
#endif

#include <ti/drivers/SDSPI.h>
#include <ti/drivers/sdspi/SDSPITiva.h>

/* SDSPI objects */
SDSPITiva_Object sdspiTivaObjects[VL01_SDSPICOUNT];

/* SDSPI configuration structure, describing which pins are to be used */
const SDSPITiva_HWAttrs sdspiTivaHWattrs[VL01_SDSPICOUNT] = {
    {
        SSI3_BASE,          /* SPI base address */

        GPIO_PORTD_BASE,    /* SPI SCK PORT */
        GPIO_PIN_0,         /* SCK PIN */
        GPIO_PORTD_BASE,    /* SPI MISO PORT*/
        GPIO_PIN_2,         /* MISO PIN */
        GPIO_PORTD_BASE,    /* SPI MOSI PORT */
        GPIO_PIN_3,         /* MOSI PIN */
        GPIO_PORTD_BASE,    /* GPIO CS PORT */
        GPIO_PIN_1,         /* CS PIN */
    }
};

const SDSPI_Config SDSPI_config[] = {
    {&SDSPITiva_fxnTable, &sdspiTivaObjects[0], &sdspiTivaHWattrs[0]},
    {NULL, NULL, NULL}
};

/*
 *  ======== VL01_initSDSPI ========
 */
void VL01_initSDSPI(void)
{
    /* Enable the peripherals used by the SD Card */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);

    /* Configure pad settings */
    GPIOPadConfigSet(GPIO_PORTD_BASE,
            GPIO_PIN_0 | GPIO_PIN_3,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    GPIOPadConfigSet(GPIO_PORTD_BASE,
            GPIO_PIN_2,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);

    GPIOPadConfigSet(GPIO_PORTD_BASE,
            GPIO_PIN_1,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    GPIOPinConfigure(GPIO_PD0_SSI1CLK);
    GPIOPinConfigure(GPIO_PD2_SSI1RX);
    GPIOPinConfigure(GPIO_PD3_SSI1TX);
    
    
    SDSPI_init();
}

I have also been debugging usng the SDSPI objects structure as you suggested. I am getting a "no card" for the card type after the SPI init and SPI open calls. SPI open returns an FR_OK status but any f_open calls or simliar return an FR_NOT_READY status. Unfortunately I am short on time today, but tomorrow I will grab the scope and make sure there are signals being sent out to the card.

Thanks,

Vikram,

I have noticed and corrected the SSI1 error in the GPIO pin configure calls, but it doesn't seem to have made any difference. I have also hooked up the scope to and am not seeing any activity at all except on the CS select line. I will keep digging and let you know if I resolve this.

Thanks,

Jonathan,

Were you able to solve this issue?

Vikram