Hwi Interrupt Numbers and Event Ids for AM335x

processor_sdk_rtos_am335x_2_00_00_00, CCSv6.1

I was trying to access two SD cards, one MMC0 and the other on MMC1, at the same time using the MMCSD LLD drivers provided in the Processor SDK.  This bit of code in MMCSD_soc.c gave me trouble:

/* MMCSD configuration structure */
MMCSD_v1_HwAttrs MMCSDInitCfg[3U] =
{
    {
    	SOC_MMCHS_0_REGS,
        15,
        82,
        96000000U,
        400000U,
        MMCSD_CARD_SD,
        (MMCSD_BUS_WIDTH_1BIT | MMCSD_BUS_WIDTH_4BIT),
        1,
        0
    },
    {
    	SOC_MMCHS_1_REGS,
        15,
        82,
        96000000U,
        400000U,
        MMCSD_CARD_SD,
        (MMCSD_BUS_WIDTH_1BIT | MMCSD_BUS_WIDTH_4BIT),
        1,
        0
    },
    {
    	SOC_MMCHS_2_REGS,
        15,
        82,
        96000000U,
        400000U,
        MMCSD_CARD_SD,
        (MMCSD_BUS_WIDTH_1BIT | MMCSD_BUS_WIDTH_4BIT),
        1,
        0
    }
};

Notice that the interrupt numbers are specified as all the same (15) as well as the event Ids (82) for all of the controllers.  This generates errors when you try to open more than one controller at the same time.  Additionally, why 15 and 82?  These numbers seem to have nothing to do with the actual interrupts that are assigned to MMC0, MMC1 and MMC2.  What should be specified here?  Aren't these interrupt numbers suppose to be the same as Table 6-1 in the AM335x TRM?