EDMA3 on C6747 dsp

Rex Taylor75

Other Parts Discussed in Thread: TMS320C6747, SYSBIOS, CODECOMPOSER

I want to be be able to update the EPWM1.CMPA register from EDMA3, so the CMPA register will be the destination, thus changing the mark/space ratio. The event to instigate the transfer is generated by a Timer.

I have been able to set up a buffer transfer ACNT = 1, and BCNT = 256 with the src index incrementing and the dst index at 0x00 to memory blocks successfully. i.e srcBuffer[256], destBuffer[256];

However, switching the destination to point to CMPA fails with no data written to the register.

I have based my code on that available from QUICKSTART for the C6747 dsp, project "EDMA_event_trig_dspL137". I am developing with SYS/BIOS v6.

Is this something that is possible, can you give me some pointers please?

Thank you

over 10 years ago

0 Raja over 10 years ago

TI__Guru* 81335 points

Hi Rex,
Moved this thread over C67x Single Core DSP forum for appropriate response. Thank you.

0 RandyP over 10 years ago

TI__Guru* 84110 points

Rex,

Have you proven that you can get the same functionality by using the DSP to write to the CMPA register when the timer interrupt occurs?

Your destBuffer is 256 units in size (bytes or what?) but you are talking about writing to the same address each time. Do you only write 1 byte to the first location in destBuffer, or what is your memory test doing? It should write to only one location repeatedly to check the DMA channel's behavior.

It may be needed to change ACNT to 4 and arrange your data to be 32-bits wide. The peripheral port writes generally need to be 32-bit wide operations. Try it to see what could change to get the results you want.

Regards,
RandyP

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

Hi, thank you for replying.

I have made some progress but now seem to have hit a brick wall.

My target is to be able to use Timer0 event id 4 to initiate an edma transfer of 16bits from my source register to the CMPA register of ePWM1.

Before attempting this I just want to do a block transfer of 16 bit data from src to dest.

However, it seems that SYS/BIOS is using Timer0 because as soon as I start BIOS_start(); I see the EDMA transfer complete interrupt and all the data has been moved to the dest. My timer0 isr has not been called at the point where my breakpoint has been hit in the edma3 transfer complete isr.

Is this correct, does SYBIOS use Timer0 which in turn generates the events 4 and/or 64?

General settings I am using are

EDMA int 4 event id 8

Timer0 int 5 and event id 4

EDMA channel 10

Acnt = 2

Bcnt = 0x20

Ccnt = 1

SrcIndex = 1

DestIndex = 1

Cidex = 0

I have tried swapping around the above interrupt numbers, and using channel 11 with event id 64, as well as some other combinations/configurations.

Any ideas would be welcome.

Thank you

0 RandyP over 10 years ago in reply to Rex Taylor75

TI__Guru* 84110 points

Rex,

SYS/BIOS definitely uses a timer, so it makes sense that it would use the first available timer, Timer0. I am sure there is a way to change which timer SYS/BIOS uses, but the better thing to do, in my opinion, is for you to change your code to use Timer1 instead of trying to make sure everything in SYS/BIOS changes. If you need more information about how SYS/BIOS works with its timer and how to change it, you should post a new question on the TI-RTOS Forum or do a search in CCS Help.

After you have proven that you can copy data from src to dest with the EDMA3 channel, next you should prove that you can get the same functionality by using the DSP to write to the CMPA register when the timer interrupt occurs.

It may be important to change ACNT to 4 and arrange your data to be 32-bits wide. The peripheral port writes generally need to be 32-bit wide operations. Try it to see what could change to get the results you want.

Your SrcIndex and DestIndex above are set =1 but they should be =2 for the one that will be pointing to memory and =0 for the one pointing to CMPA.

Regards,
RandyP

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

Thanks for the quick reply.

However, I am not sure I have the option to change to Timer1. Does Timer1 map to the EDMA3 channels on the C6747, as Timer0 maps to channels 10 and 11?

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

More information.....

My understanding is that the EDMA3 has 2 Timer0 related events, these being Event 10(Timer64P0_Event_Out_12) and Event 11 (Timer64P0_Event_Out_34).

Now looking at register INTC0->INTMUX3 shows that INTSEL14 is mapped to Event 4, probably explaining why I cannot use EVENT10 on the EDMA3 when running Sys/Bios.

However, my understanding is that I should be able to use Event 11 of the EDMA3 module, which is Timer64P0_TINT34 Event 64 of the DSP Interrupt map.

The int to event mapping for Timer0 and Timer1 are

TMS320C6747

Timer ID Timer Name Timer Base Address Timer Interrupt Number Timer Event Id Timer Frequency (in Hz)
0 Timer0 0x1c20000 14,4 4,64 24000000
1 Timer1 0x1c21000 15,5 40,48 24000000

Taken from file:///C:/TI/bios_6_42_01_20/docs/cdoc/ti/sysbios/timers/timer64/doc-files/TimerTables.html

So when I try to use Event11 with the following code

void CreateTimer(UArg arg0)
{
Error_Block eb;
Error_init(&eb);

Timer_Params timerParams;
Hwi_Params timerHWIParams;

Timer_Params_init(&timerParams);
Hwi_Params_init(&timerHWIParams);

timerHWIParams.eventId = 64; //4;
timerParams.intNum = 4;

timerParams.period = 1000 * 100;
timerParams.startMode = Timer_StartMode_AUTO;
timerParams.hwiParams = &timerHWIParams;
timerParams.arg = (UArg)arg0;

//timerParams.arg = NULL;
Timer_Handle timer = Timer_create(1, (Timer_FuncPtr)myTimerFxn, &timerParams, &eb);
if (timer == NULL)
{
System_abort("Timer create failed");
}
Timer_start(timer);
}

I am surprised to see that INTC0->INTMUX1->INTSEL4 shows Event 40 instead of Event 64. Event 40 is T64P1_TINT12 of the DSP interrupt map.

0 RandyP over 10 years ago in reply to Rex Taylor75

TI__Guru* 84110 points

Rex,

Rex Taylor75 said:
However, I am not sure I have the option to change to Timer1. Does Timer1 map to the EDMA3 channels on the C6747, as Timer0 maps to channels 10 and 11?

You are correct. For the C6747, to use a timer to trigger a DMA channel you will need to use Timer0. This means you will need to switch SYS/BIOS to use Timer1. Someone else may be able to help you with that part, or you can ask about it on the TI-RTOS Forum (link above).

Regards,
RandyP

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

Hi Randy

Thanks once again for the prompt response.

I think I should still be able to use Timer64P0_TINT34, however when I try to set it up as follows

void CreateTimer(UArg arg0)
{
Error_Block eb;
Error_init(&eb);

Timer_Params timerParams;
Hwi_Params timerHWIParams;

Timer_Params_init(&timerParams);
Hwi_Params_init(&timerHWIParams);

timerHWIParams.eventId = 64; //4;
timerParams.intNum = 4;

timerParams.period = 1000 * 100;
timerParams.startMode = Timer_StartMode_AUTO;
timerParams.hwiParams = &timerHWIParams;
timerParams.arg = (UArg)arg0;

//timerParams.arg = NULL;
Timer_Handle timer = Timer_create(1, (Timer_FuncPtr)myTimerFxn, &timerParams, &eb);
if (timer == NULL)
{
System_abort("Timer create failed");
}
Timer_start(timer);
}

INTC0->INTMUX1->INTSEL4 shows 40 and not 64 as I believe it should. As a result the EDMA3 module will not see the correct event mapping to Channel 11, i.e Timer64p0_Event_Out_34.

Can you offer any assistance?

Regards

0 RandyP over 10 years ago in reply to Rex Taylor75

TI__Guru* 84110 points

Rex,

It was my pleasure to try to help you based on your original post asking about using the EDMA3 with the CMPA register. Since the direction of the thread has changed, you may want to consider a new thread specifically addressing your new topic direction.

I do not know if you can split and share Timer0 with SYS/BIOS, if that is what you are trying to do. And I do not know how the SYS/BIOS initialization would interact with your initialization, so I cannot offer any assistance here.

You can wait here for someone else, but it may be best to start another thread and close this one.

Regards,
RandyP

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

I now have the edma3 working but have another question.

The clock sys/bios is using can be moved to Timer1 by adding the line

Clock.timerId = 1;

to the project.cfg file.

I am currently using ParamSets 10, 64 and 65. The LINK field are as follows

Pset 4 links to Pset 64

Pset 64 links to Pset 65

Pset 65 links to Pset 64.

My understanding is that when the IPR signals an event completion, Pset 64 and Pset 65 get copied over Pset 10 in turn.

The part I am missing is when the IPR is generated, which Pset has just completed?

As a side issue I am unable to view the PARAMSET registers in code composer. I see the messgae Error: unable to read.

Thanks for any help.

0 Rex Taylor75 over 10 years ago in reply to Rex Taylor75

Prodigy 140 points

I now have the edma3 working but have another question.

The clock sys/bios is using can be moved to Timer1 by adding the line

Clock.timerId = 1;

to the project.cfg file.

I am currently using ParamSets 10, 64 and 65. The LINK field are as follows

Pset 10 links to Pset 64 Sorry earlier I wrote Pset 4 links to Pset 64duh

Pset 64 links to Pset 65

Pset 65 links to Pset 64.

My understanding is that when the IPR signals an event completion, Pset 64 and Pset 65 get copied over Pset 10 in turn.

The part I am missing is when the IPR is generated, which Pset has just completed?

As a side issue I am unable to view the PARAMSET registers in code composer. I see the messgae Error: unable to read.

Thanks for any help.

0 Rex Taylor75 over 10 years ago in reply to Rex Taylor75

Prodigy 140 points

Can anyone help, ????

0 RandyP over 10 years ago in reply to Rex Taylor75

TI__Guru* 84110 points

Rex,

Rex Taylor75 said:
My understanding is that when the IPR signals an event completion, Pset 64 and Pset 65 get copied over Pset 10 in turn.

The last half of the sentence is correct: Psets 64 & 65 will get copied over Pset 10 whenever DMA channel 10 determines that it has completed everything its ACNT & BCNT & CCNT have told it to do.

The first half of the sentence has the wrong cause and effect. The IPR bit is set as a result of a Transfer Request signalling completion from the Transfer Controller. This is independent from the Channel Controller determining that DMA channel 10 has completed its counts, although it may happen close to the same time. IPR can be set by intermediate events that would be long before the Link copy occurs. And the CC's completion causing the Link copy could happen a long time before the completion event returns to set the IPR bit, of course the time depends on what was being EDMA'd and what is going on in the system, etc. And, IPR might not even be set if the related OPT bits were both 0.

Rex Taylor75 said:
The part I am missing is when the IPR is generated, which Pset has just completed?

With the above explanation in mind, the Pset that has just completed is always the one in Pset 10. You never execute out of the Link sets, they are only copied into Pset 10. So only Pset 10 is active and completes. Most of the time, you will use the same interrupt with all of the Psets, so there is no way to affirmatively know which of the link sets was being used when the latest IPR bit is set. You could use a different interrupt number for all 3 original loads of Psets 10, 64, and 65 to notice it. But most programs just keep track by the order and can handle two different ping & pong buffers easily.

Rex Taylor75 said:
As a side issue I am unable to view the PARAMSET registers in code composer. I see the messgae Error: unable to read.

There are many things you could be doing wrong. The Psets are viewable for sure.

Regards,
RandyP

0 Rex Taylor75 over 10 years ago in reply to RandyP

Prodigy 140 points

Thnaks RandyP for the correction regarding the generation of the IPR.

Regarding CodeComposer and viewing the PARAMENTRY registers I came accross

https://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/418469

which helped me out.

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EDMA3 on C6747 dsp