Keystone II Linux PCIe Serdes equalization.

Dear Bill,

You can refer below documents for SerDes configuration, please let us know if these documents does not has enough information you wanted.

KeyStone Architecture Peripheral Component Interconnect Express (PCIe) UG : http://www.ti.com/lit/sprugs6

KeyStone II Architecture Serializer/Deserializer (SerDes) UG - http://www.ti.com/lit/spruho3

Thank you.

There is a default configuration that is in the PCIe Driver. Does this configuration set equalization parameters for driving short traces? Or are these parameters set for longer back plane runs? There is virtually zero documentation on the initial configuration given in the source files above.

We are running PCIe in a test setup over a longer cable run and it seems to work well and the eye diagram seems to be wide open. When we move from the test setup to the final configuration (without the longer cable) the PCIe fails to enumerate (unable to look at eye diagram in this configuration). This would make sense if the equalization settings were set for longer back plane runs, and then in our shorter traces we could be over equalizing. It is also possible this same thing could be happening at the endpoint but are unsure at this moment.

If you want to tune those parameters, you need to look at:

KeyStone II Architecture Serializer/Deserializer (SerDes) User Guide, PCIE is PHY-A 2-lane. Look at Section 12.2, for TX_ATT and SWING level setting, also CM, C1, C2 for transmitter side. Section 13.1 for Rx side, RX_ATT and BOOST, they can be set to adaptive or forced to a specific value.

The Linux kernel, I assume, used some default value. If you find the value doesn't work for some trace length, you have to tune them. There are some tools for eye diagram and BER sweep under PDK:  pdk_keystone2_3_01_04_07\packages\ti\diag\serdes_diag. Look at user guide at docs folder first to understand the usage first.

Regards, Eric  

Ok, I had an older version of the pdk which did not include any of these tools or examples. I have now gotten the serdes_diag_eye_K2KC66ExampleProject to compile but all of the tools are created for very specific setups (EVM<->EVM) which I don't see how that could help anyone wanting to test and calibrate custom boards that do not talk to other Keystone II devices.

I have been successful in modifying the software to only use a single keysone II, but it seems that there is little documentation on how to use the serdes "test bus" that the example makes use of. I am having trouble getting the program to get past this line of code from serdes_diag_test.c

/* Check RX Valid */
CSL_SerdesWaitForRXValid(eye_init_params.base_addr, SERDES_DIAG_MAX_LANES, eye_init_params.lane_mask);

It spins in a while loop while waiting for bit 5 of Test_bus_data to be a 1:

csl_serdes.h

while ((stat != 1) && (timeout != 0))
{
stat = (CSL_SerdesReadSelectedTbus(base_addr, lane_num+1, 0x2) & 0x020)>>5;
timeout--;
}

Is there any documentation on how to use the test bus, or examples of how do get an eye diagram when I do not have 2 keystone II EVMs connected to each other.