• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 101 subscribers
  • Views 3796 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCIe System Architecture

Mohnish Belani
Prodigy 30 points

Hi all,

I have PCIe System with multiple endpoints, PCIe switches & a PCIe bridge.

I have a root complex at the top of the hierarchy.

Suppose a PCIe endpoint (say endpoint 1) wants to communicate with another PCIe endpoint (say endpoint 2).

Can these 2 endpoints communicate with each other by bypassing the CPU??

If yes could you please explain the data flow??

I have attached an image of the PCIe system.

  • 0
    TI__Guru 65405 points

    Hi Mohnish,

    The PCI Express bus link supports full-duplex communication between any two endpoints, with no inherent limitation on concurrent access across multiple endpoints. Therefore the CPU bypassing is possible but the software working on the PCIe endpoints should be able to do such kind of communication.

    BR
    Tsvetolin Shulev