I’m confused by some things I’ve read in the TRM and datasheet about GPMC clock. Up to this point, I've heard from TI that the GPMC clock is gated in synchronous mode and there's not a way to have it run continuously or output another clock that is synchronous to the internal GPMC clock. The datasheet lists the GPMC Clock as bidirectional (table 4-8, page 123) with this note:
(1) This clock signal is implemented as 'pad loopback' inside the device - the output signal is looped back through the input buffer to serve
as the internal reference signal. Series termination is recommended (as close to device pin as possible) to improve signal integrity of the
clock input. Any nonmonotonicity in voltage that occurs at the pad loopback clock pin between VIH and VIL must be less than VHYS.
and clkout1 is described in Table 4-29 (page 151) as:
Device Clock output 1. Can be used externally for devices with noncritical timing requirements, or for debug, or as a reference clock on GPMC as described in Table 4-8. GPMC Signal Descriptions.
After reading these, I just want to make sure there’s no possible way to drive the GPMC clock externally or use clkout1 as a continuously running version of the GPMC clock. I haven’t found similar information in the TRM and the evaluation module doesn’t use GPMC. I will be connecting this bus to an FPGA and would like to have a continuously running clock that is synchronous to the GPMC bus.
Thanks,
Jeff
SIGNAL NAME DESCRIPTION TYPE BALLclkout1 Device Clock output 1. Can be used externally for devices with noncritical timing O F21/ P7requirements, or for debug, or as a reference clock on GPMC as described inTable 4-8. GPMC Signal Descriptions.
