This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

EVMK2H load four different arm baremetal application?

Other Parts Discussed in Thread: 66AK2H14

Hi all:

I am using EVMK2H to do some tests,I have a question which was asked by the others before,but i do not get the answer:

1,       the keystone II doc says:  when the arm corepac Core0 is the boot master and performs the boot process, the other three arm processor stay idle by executing  WFI instruction . it may send interrupts to the other three Cortex A15 processor cores through IPC register。

2.        depends on the defination of the Maggic address:    The address where the core goes after the boot process begins (from idle, after it gets an interrupt)

 from above two points, after arm core0 boot finishs, if I provide three different magic address to the arm core1.  core2  .core3(arm boot ram memory map support this). and load three different baremetal application to these addressed, and then the other three arm cores branch to the magic address .that means the EVMK2H can run four different baremetal applications. 

am i right??  I know the zynq7000 soc (have two cortex A9 cores)can run two different baremetal app,does  66ak2h14 support this? Is there some example demo??

thank you very much.

  • Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

  • Yes. Your understanding is correct.

    As of now we have ARM boot examples in which, core0 boots up first then wakes up secondary cores 1-3 to execute some code.

    You can refer them to implement run individual cores. Please find the link below.

    Thank you