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Why the EDMA repeat itself forever?

Other Parts Discussed in Thread: OMAP-L137

I am using OMAP-L137, and use following function to copy memory by EDMA:

void EDMA_copy(int channel, Uint32 src, Uint32 dst, Uint32 nbytes)
{
    edma3ccRegs->ECR |= 1 << (channel);
    edma3ccRegs->SECR |= 1 << (channel);

    edma3ccRegs->PARAMSET[channel].OPT =
        CSL_FMKT(EDMA3CC_OPT_TCINTEN, DISABLE) |
        CSL_FMKT(EDMA3CC_OPT_TCCHEN, ENABLE)  |
        CSL_FMKT(EDMA3CC_OPT_STATIC, STATIC)  |
        CSL_FMK(EDMA3CC_OPT_TCC, 0);

    edma3ccRegs->PARAMSET[channel].SRC = src;
    edma3ccRegs->PARAMSET[channel].DST = dst;

    edma3ccRegs->PARAMSET[channel].SRC_DST_BIDX = 0;
    edma3ccRegs->PARAMSET[channel].SRC_DST_CIDX = 0;
    edma3ccRegs->PARAMSET[channel].LINK_BCNTRLD = 0xffff;

    edma3ccRegs->PARAMSET[channel].A_B_CNT =
            CSL_FMK(EDMA3CC_A_B_CNT_ACNT, nbytes) |
            CSL_FMK(EDMA3CC_A_B_CNT_BCNT, 1);

    edma3ccRegs->PARAMSET[channel].CCNT = 1;

    edma3ccRegs->ESR |= 1 << (channel);
}

and call the function by:

EDMA_copy(0, (Uint32)srcBuffer, dst, 8);

while(1);

it copy 8 bytes from srcBuffer to dst forever.

If I add CER in Expression watch window, the bit 0 switching between 0 and 1.

If I modify some bytes in srcBuffer, the bytes in dst changed also. It seems that the EDMA repeat itself.

I want to know how to set the EDMA to copy the memory only once.

  • Hi,

    Thanks for your post.

    I think, there is a demo code available to demonstrate basic EDMA operations using the Register CSL macros. This example initializes the EDMA3 channel controller using the rCSL macros to perform two simple 1KB internal memory to memory transfers. These transfers are broken up into smaller packets (128 byte transfers), allowing the EDMA3 peripheral to alternate between the two larger transfers.

    Here in this example, the  EDMA3 channel controller consequently sends a transfer request to the transfer controller and the first data packet in the ping source buffer would be transferred to the ping destination buffer. The EDMA3 next sends a transfer request to the transfer controller requesting a pong data transfer. This sequence would be repeated until all data packets for both the ping and pong source buffers are transferred. Upon completion of the transfer, the EDMA3 channel controller sends an interrupt to the CPU and the source and destination buffers were compared to verify the EDMA3 transfer. The results were then printed to the console.

    Kindly install the quickStartOMAPL1x_rCSL-2.0 package and you would see the EDMA pong pong example project from the below path after installation:

    ~\ti\quickStartOMAPL1x_rCSL\OMAPL1x\rCSL_examples\evmOMAPL137\DSP_examples\edma\EDMA_ping_pong_dspL137\build

    Please find attached the setup file for quickStartOMAPL1x_rCSL-2.0 installation

    /cfs-file/__key/communityserver-discussions-components-files/791/1220.quickStartOMAPL1x_5F00_rCSL_2D00_2.0_2D00_Setup.exe

    Thanks & regards,

    Sivaraj K

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  • Hi
    Please take some time to study the user guide on EDMA and understand what sets the CER and various OPT fields etc.
    Your example should start working 1 shot only instead of chain to self hopefully if you simply change
    CSL_FMKT(EDMA3CC_OPT_TCCHEN, ENABLE) |
    to
    CSL_FMKT(EDMA3CC_OPT_TCCHEN, DISABLE) |