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[C6678 EVM] SPI Boot Parameter Table index looks wrong...

Hi,

I'm investigating the boot failure problem from SPI NOR on C6678 EVM.
I succeeded the booting with Boot Parameter Index as 0, but I failed if we changed it to 1. I checked the contents of SPI NOR, but I could not see any errors. The Boot Table Parameter resided at 0x80 offset on SPI NOR and its contents looked fine for me. 

So now I'm reviewing the ROM Bootloader source code and I have a question about the implementation. Please take a look at the following function:

void bootInitBootParamsSpi (BOOT_PARAMS_SPI_T *params)
{
    UINT32 v;

    params->length    = CHIP_WORDS_TO_BYTES(sizeof(BOOT_PARAMS_SPI_T));
    params->checksum  = 0;
    params->boot_mode = BOOT_MODE_SPI;
    params->portNum   = chipDefaultSpiPortNum ();

    v = chipDefaultSpiPll ();
    params->swPllCfg_msw = chipUpper16 (v);
    params->swPllCfg_lsw = chipLower16 (v);


    params->options   = chipDefaultSpiOptions ();

    params->addrWidth = chipDefaultSpiAddrWidth ();
    params->nPins     = chipDefaultSpiNPins ();
    params->csel      = chipDefaultSpiCsel ();
    params->mode      = chipDefaultSpiMode ();
    params->c2tdelay  = chipDefaultSpiC2tDelay ();

    params->cpuFreqMhz = chipCoreFreqMhz ();
    params->busFreqMhz = chipDefaultSpiBusFreqMhz ();
    params->busFreqKhz = chipDefaultSpiBusFreqKhz ();

    v = chipDefaultSpiReadAddr ();
    params->read_addr_msw = chipUpper16 (v);
    params->read_addr_lsw = chipLower16 (v);

    params->next_csel = chipDefaultSpiNextCsel ();

    v = chipDefaultSpiNextReadAddr ();
    params->next_read_addr_msw = chipUpper16 (v);
    params->next_read_addr_lsw = chipLower16 (v);

} /* bootInitBootParamsSpi */

Where, chipDefaultSpiReadAddr() is being defined as below:

 #define chipDefaultSpiReadAddr()            ((CHIP_WORDS_TO_BYTES(sizeof(BOOT_PARAMS_T))) * readDevstatBits(7,6))

As you see, readDevstatBits(7,6) is extracting data from bit6:7 bit-field from DEVSTAT register.
I believe this code is intended to extract "Parameter Table Index" from DEVSTAT register, but it looks wrong considering the datasheet descriptions -- Datasheet says Parameter Table index resides on bit4:7. Why does ROM Bootloader extract the data from this part ? 

I'm wondering if this might be a bug on ROM Bootloader. The interesting point was the booting was succeeded when DEVSTAT was configured as 0x144D. Considering the datasheet spec, this should not be correct configuration for the index 1, but ROM bootloader seems it regards the Boot Parameter Index as 1 (bit6:7 can be regarded as 1) and understands that boot parameter is existing at 0x80 offset on SPI NOR Flash, and eventually, the boot looks being succeeded. 

Best Regards,
Naoki Kawada

  • Hi Naoki Kawada,
    Thank you for the post. We are working on this and will get back to you early next week.
  • Hi Naoki Kawada,

    Your observation on SPI boot parameter table index is correct. Thank you for bringing to our notice. The initial plan was to implement 4 bits of index and later due to design limitation only 2 bits were implemented.

    It should be,

    6-5 - Parameter Table Index.

    4-3 - Reserved. 


    This is applied for both C6678 and C6670 devices. I have filed an IR(litbug) to update this information on data manual's of C6670 and C6678.

    Litbug reference: SDOCM00120117 & SDOCM00120118.

    Thank you.

  • Hello Raja,

    Thanks for your clarifications. Got it.
    As for C665x, the implementation of ROM Bootloader looks correct. This bug would be applicable to C6670 and C6678.  I will bring the notice to our customers.

    Best Regards,
    Naoki Kawada

  • Yes. Your understanding is correct. Thank you.