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AM57x EMIF Initiator Prioritization

I'm looking for some clarification on the relationship between the following two register settings:

  1. CTRL_CORE_EMIF_INITIATOR_PRIORITY_1:  MPU_EMIF_PRIORITY
  2. MA_PRIORITY:   PRIORITY

Both claim to set the MPU's priority for EMIF access.

  1. What is the difference between these two register settings?
  2. Which one do you modify if you want to alter the MPU's EMIF priority?

My understanding is that any access to EMIF from the MPU would be traveling through the MPU Memory Adapter (MA).

Thanks

  • Hi Gerard,

    "1. What is the difference between these two register settings?"
    The control module register CTRL_CORE_EMIF_INITIATOR_PRIORITY_1 affects the priority of transactions to EMIF that are routed through L3_MAIN interconnect (path is initiator -> L3_MAIN -> DMM -> EMIF, see Figure 2-1. Interconnect Overview). It is useful to set priority when multiple initiators try to access the EMIF controller.

    The MA_PRIORITY register sets the priority on the direct path (see Figure 2-1. Interconnect Overview) between MPU & EMIF (these transactions are not managed by L3_MAIN).

    "2.Which one do you modify if you want to alter the MPU's EMIF priority?"
    As I stated above, when you use the direct path between MPU & EMIF, which does not go through L3_MAIN interconnect, you should use MA_PRIORITY register.
    If you access the EMIF from L3_MAIN, the CTRL_CORE_EMIF_INITIATOR_PRIORITY_x registers should be used.

    Best Regards,
    Yordan