AM437x - Asynchronous Parallel NOR Flash Interface, Booting

Hi,

wbutner said:

In the AM437x Technical Reference Manual, Section 5.2.6.3.2, Tables 5-12, 5-13 and 5-14 mention a superset of signals used for interface to NOR flash memory.

These are all the signals that ROM code initializes for NOR boot. It's not necessary to connect them all, but you must make sure that if you use some of these signals for other purposes the functionality will not be affected by this initialization.

wbutner said:

a) If a hardware reference design schematic is available for the AM437x utilizing asynchronous parallel NOR flash.

At the moment there is no AM437X reference design with NOR flash.

wbutner said:

b) Which signals from Tables 5-12, 5-13 and 5-14 are not used for interfacing to asynchronous parallel NOR flash (to confirm that advn_ale, be0n_cle, and clk [gpmc_advn_ale, gpmc_be0n_cle, gpmc_clk] are not used).

This would depend on the NOR device you intend to use.

Thank you for your reply.

There are two NOR devices that are candidates, both 1 Gb, which are close to footprint compatible.

a) Micron JS28F00AM29EWHA (8/16 bit data bus interface)

b) Spansion S29GL01GS10TFI010 (16 bit data bus interface)

In lieu of the fact that no asynchronous NOR flash reference design is available, it would be helpful if confirmation of the following points could be obtained.

1) That either of these devices is supported by the AM437x.

2) For interface to either device, unused pins include: advn_ale, be0n_cle, and clk [gpmc_advn_ale, gpmc_be0n_cle, gpmc_clk]

3) The AM437x can boot from a single such NOR flash device.

Many thanks again for your assistance.