C6678 PCIe Endpoint is setting Error Flags when trying to trigger MSI interrupt

Thomas Decker

A few days ago I successfully triggered a MSI interrupt by a C6678 Endpoint on a C6678 RootComplex. When trying to do the other direction, the Endpoint sets some error flags in config space instead of firing the MSI. The configuration of the PCIeSS is almost the same except the RootComplex enumeration stuff.

Following errors are set: Unsupported Request, Non-Fatal Error and UncorrectableError

The thing is: The RootComplex can write data into the BAR1 of the Endpoint without any problems. The the errors seem to occur to every read/write to BAR0 config space.

I have read other threads concerning MSI on Endpoints, but didn't get any further. Any idea what is happening here?

over 9 years ago

0 Victor Kazmirenko over 9 years ago

Guru 13202 points

Thomas,

AFAIK the concept is that interrupts flow from EP to RC, but opposite direction is not valid. You could not find exactly this wording in the manual, the write:

When operating as an EP, the PCIESS is capable of generating MSI or legacy interrupt...

When operating as RC, the PCIESS is capable of handling both MSI and legacy interrupts...

So we have to read that as EP is the only source of MSI, and RC is the only target.

0 Thomas Decker over 9 years ago in reply to Victor Kazmirenko

Prodigy 140 points

Hi rrlagic,

I really hope you're wrong in this case. I need those Endpoint interrupts. And according to the PCIe KeyStone User's Guide this should be possible.

Chapter 2.14.4 "Interrupt Reception in EP Mode" says:
The MSI interrupts are not supported on EP devices as per PCIe specification but the PCIESS does support these interrupts.

The not working MSI Interrupts seem only to be the result of not being allowed to access BAR0 of this Endpoint...

0 Victor Kazmirenko over 9 years ago in reply to Thomas Decker

Guru 13202 points

Definitely, I am wrong. Then you already know a check list: bus mastering, disable legacy INTx, memory space, translations.

0 Thomas Decker over 9 years ago in reply to Victor Kazmirenko

Prodigy 140 points

Got it working!

Was a mixture of wrong BAR0 and BAR1 Type settings (was somehow marked as 64bit each) and wrong memory windows inside the PLX switch up- and downstream bridges. Thank you!

0 Ganapathi Dhandapani95 over 9 years ago in reply to Thomas Decker

TI__Mastermind 28085 points

Thomas,

Thanks for your update.

rrlagic,

Thanks for your contribution in e2e forum.

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C6678 PCIe Endpoint is setting Error Flags when trying to trigger MSI interrupt