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TCI6630K2L support for DFE bypass

Other Parts Discussed in Thread: TCI6630K2L, RFSDK

I am evaluating using the TCI6630K2L in an application. I am looking at using the JESD204 interface, but the DFE capability would need to be bypassed in that application. I noticed the bypass feature is currently not supported. Is there a schedule or expected time frame when the bypass mode will be supported?

Thanks

Mark 

  • Mark,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

  • Mark,

    Can you please provide more information about your requirements for DFE bypass?

    Thanks

    Cesar

  • Hello Mark,

    The DFE bypass has two modes,

      (a) DFE Signal processing bypass (14bit magnitude and sign), that can be used for 1, 2, or 4 JESD lanes.   It is typically used for

    1 Axc baseband channel to 1 stream.   This mode allows for JESD Transport to accommodate different LMKF JESD link parameters (S=1,HD=0).

      (b) DFE JESD bypass that can be used for 1 JESD lane.  The JESD transport parameters must conform to Time Division Multiplexed IQ format, there

    is a restricted set of JESD link parameters. 

    Bypass (a) is being worked on for Adjacent Market Design 3, which is planned to release in 2016.  Please contact Sneha for a more accurate date if needed.

    You may find in explaining the mode you want to operate-in, that DFE can be used with a minimal signal processing impact.  These types of configurations, if tied to the existing LTE5, LTE10, LTE20, or adjacent market design 1, may allow you to do work with the existing RFSDK implementations.  

    If you wish to provide more details on your application, we might be able to suggest a starting configuration.  There is a JESD loopback configuration that can be used to run IQ waveforms from DDR memory through the DSP to IQN to DFE, back to IQN back through L2 memory to DDR.  For some customers this is a good place to start.

    Regards,

    Joe Quintal

  • Joe,

    My application has different configurations. In one case, it will be LTE5, LTE10, or LTE20. In another it will be UMTS. For these configurations, I am looking at connecting to an FPGA where our own proprietary algorithms will be used for CFR/DPD. The FPGA would then connect to the RFIC. There are other configurations as well that have sample rates that are not integer multiples of these cellular standards.

    Mode (b) seems interesting. What are the restricted set of JESD link parameters?

    Thanks
    Mark