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c6701 flash CE signal delay occur problem



Hi all,

I use c6701, my flash is in CE1,configured as 16 bit rom, and I can write data to the flash correctly, but the problem is everytime when I write a short data to flash, it takes about 500ms+, I find that when I write 3 flash program commands, the flash ce signal is normal,but after flash program command, I write my data to flash, this time, the flash ce signal appear about 500ms delay after the third flash pragram command, because of this problem, my flash program 1KB data about spending 2 minutes, this is too slow for me. Can anyone help me solve this problem?  The DSP is 100Mhz.

Best Regards,

Si

  • Hi Si,
    Able to write the data on flash through memory window of CCS browser ?
    Tweak the SETUP/HOLD timing parameters and check.
    Are you using TI example code or own code ?
  • Hi Shankari,

    I am not clear why you said "Able to write the data on flash through memory window of CCS browser ?", all flash program needs to 3 program commands and then write the data to flash, if there is no program command before write data into flash, the data can't be written into flash, so you said write the data through memory window of CCS browser I think it's not correctly.

    you said "Tweak the SETUP/HOLD timing parameters and check". I use the power on  default  timing parameters, which I have  calculated, it can't be 500ms delay.  Another I need remind you is that the  program command CMD0,CMD1,CMD2 ce signal is noraml,ONLY the write data  ce signal is 500ms delay.

    There is my flash write function:

    int flash_write(unsigned int* pSRC, unsigned int* pDST, int size)

    {

    int i = 0;

    unsigned short *pSrc = (unsigned short*)pSRC;

    unsigned int   *pDst = (unsigned int*)pDST;

    for(i = 0; i < size/2; i++)

    {

    //word mode

    *(unsigned int *)(FLASH_BASE+(0x555<<2)) =  0x00aa;  //CMD 0

      *(unsigned int *)(FLASH_BASE+(0x2aa<<2)) =  0x0055;  //CMD 1

    *(unsigned int *)(FLASH_BASE+(0x555<<2)) =  0x00a0; //CMD2

    *pDst  = *pSrc; // wirte data

    pDst++;

    pSrc++;

    }

    return 0;

    }

    My flash write function copy from TI's document, I upload it to attachment.

    TMS320C6000 EMIF to External Flash Memory.pdf

  • Dear Si,
    Understood. Thanks.
    Actually I can understand that why she asked that question since we were able to access the flash contents with LCDK board and gel file has all the required flash configurations.

    Could you set the RFEN bit in SDCTL register of EMIFA.

  • Hi Titus S,
    I am not clear why you said "set the RFEN bit in SDCTL register of EMIFA. " The SDCTL register is SDRAM register, while I use flash, will the SDCTL register have influence with flash CE signal?

    Regards,
    Si
  • Dear Si,
    I have seen similar observations on C6748 and addressed by changing that self refresh bit, that's why I asked to try.
    Can you please take the scope output of CE pin ?
  • Dear Titus S.
    Here is my SDRAMCTL register configuration *(int *)EMIF_SDRAMCTL = 0x7114000;
    the RFEN bit in SDCTL register is 1.
    I have use oscilloscope capture the ce pin signal, and find that if I step by step, the ce pin signal is from high to low when write,it's normal, but just write data ce is delay 500ms, if I run at the full speed, the ce pin signal is from low to high when write. I am not sure whether there is some error.

    Regards,
    Si
  • you said you have seen similar observations on C6748, you juts set the self refresh bit as 1, the ce delay disappear?