Other Parts Discussed in Thread: SYSBIOS
Per the subject, I am having problems configuring the McASP for operation using EDMA to integrate with an audio DAC we are evaluating. We are using this with an ICE v2 with the A335X Sysbios Industrial SDK v. 1.1.0.6.
Our present application is based on the EtherCAT stack with appropriate TI patch and bsp. I have been integrating code from demoToneLoop and have been runninginto data abort exceptions upon initialization. As soon as it attempts to perform the first write to an EDMA3 register, or a McASP0 register, I get a data abort exception. If the EDMA is initialized first, it generates an exception on EDMA3Init(). If I comment out the EDMA code, it generates a data exception on the McASPTxReset function call which sets a value for MCASP_XGBLCTL.
I checked the MMU code and it looks correct. Here is a copy-paste of the applMmuEntries passed to MMUInit() in common_main():
SYS_MMU_ENTRY applMmuEntries[] =
{
{(void *)0x08000000, SYS_MMU_CACHEABLE | SYS_MMU_BUFFERABLE}, //NOR - bufferable| Cacheable
{(void *)0x08100000, SYS_MMU_CACHEABLE | SYS_MMU_BUFFERABLE}, //NOR -bufferable| Cacheable
{(void *)0x08200000, SYS_MMU_CACHEABLE | SYS_MMU_BUFFERABLE}, //NOR - bufferable| Cacheable
{(void *)0x48300000, 0}, //PWM - Non bufferable| Non Cacheable
{(void *)0x48200000, 0}, //INTCPS,MPUSS - Non Bufferable| Non Cacheable
{(void *)0x48100000, 0}, //I2C2,McSPI1,UART3,UART4,UART5, GPIO2,GPIO3,MMC1 - Non bufferable| Non Cacheable
{(void *)0x48000000, 0}, //UART1,UART2,I2C1,McSPI0,McASP0 CFG,McASP1 CFG,DMTIMER,GPIO1 -Non bufferable| Non Cacheable
{(void *)0x44E00000, 0}, //Clock Module, PRM, GPIO0, UART0, I2C0, - Non bufferable| Non Cacheable
{(void *)0x4A300000, SYS_MMU_SHAREABLE | SYS_MMU_BUFFERABLE}, //PRUSS1 -Bufferable| Non Cacheable | Shareable
{(void *)0x49000000, 0}, //EDMA3 - Non bufferable| Non Cacheable
{(void *)0x49800000, 0}, //EDMA3TC0 - Non bufferable| Non Cacheable
{(void *)0x49900000, 0}, //EDMA3TC1 - Non bufferable| Non Cacheable
{(void *)0x49A00000, 0}, //EDMA3TC2 - Non bufferable| Non Cacheable
{(void *)0x4A000000, 0}, //L4 FAST CFG- Non bufferable| Non Cacheable
{(void *)0x4A100000, 0}, //CPSW - Non bufferable| Non Cacheable
{(void *)0xFFFFFFFF, 0xFFFFFFFF}
};
That said, I can't read the memory with the memory browser either, so I'm still leaning towards an MMU issue. I'm just not sure why it's 'in the list' but not actually working. Note that I'm presently running my code through the USB debugger. Is it perhaps using an MMU setting from the debugger and not configuring the MMU based on my code? I searched briefly through the GEL files, but didn't see anything obvious there.
