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Logic PD OMAP L138 eXperimenters board - u-boot through UART2

Other Parts Discussed in Thread: OMAP-L138

I would like to replace the version of u-boot stored in the SPI FLASH with a modified copy. I'm using the DaVinici-PSP-SDK-03.20.00.11 SDK.  I am using the OMAP-L138_FlashAndBootUtils_2_25 to generate the AIS file and load it into the SoC per the serial boot instructions.

I turn S7:7-8 ON (all others off) and get the BOOTME prompt.  The AIS loader tool completes all of its steps and loads the AIS file, but the board appears to remain in a reset condition and the new image does not appear to start (the Ethernet ready light flashes at around 0.5-1Hz or so).  I have tried both the u-boot image that comes with the 3..2.0.11 SDK (in /images/u-boot) and the new u-boot I compiled.  Neither one starts.  I'd like to see this run successfully before I move forward with flashing any images to the SPI FLASH (don't want to bork my board).

When I turned CRC on, I get a CRC error about half way through the load.  I'm thinking that there is a problem with the load address for this particular board (the Logic PD

Zoom™ OMAP-L138 eXperimenter Kit).  Anyone have any problems like this or suggestions?  I've attached the ini file used for the AIS tool.

Thanks,

Erik

 

; General settings that can be overwritten in the host code
; that calls the AISGen library.
[General]

BootMode=UART

crcCheckType=SECTION_CRC

[PLLANDCLOCKCONFIG]
PLL0CFG0 = 0x00180001
PLL0CFG1 = 0x00000205
PERIPHCLKCFG = 0x00000051


[EMIF3DDR]
PLL1CFG0 = 0x15010001
PLL1CFG1 = 0x00000002
DDRPHYC1R = 0x000000C4
SDCR = 0x0A034622
SDTIMR = 0x184929C8
SDTIMR2 = 0xB80FC700
SDRCR = 0x00000406
CLK2XSRC = 0x00000000


[INPUTFILE]
FILENAME=u-boot.bin
LOADADDRESS=0xC1080000
ENTRYPOINTADDRESS=0xC1080000

  • Hi Erik,

    Are you switching back to SPI boot after using the serial boot and flashing utility?  When you're using the utility, it will use the serial port to write the u-boot to SPI flash.  To check if the program worked, you'll need to switch back to SPI boot (all switches OFF) and reboot. 

    I'm not sure what will be causing the CRC errors. 

    - Christina

  • Hi Christina,

    I'm not yet trying to flash the SPI.  I'm simply trying to load and start u-boot by loading it through the UART.  I'm following the instructions here: http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Flashing_Boot_Images_on_Linux_Without_CCS and it fails at step 6.  I do not get the u-boot prompt after the serial loader completes.

    Thanks,

    Erik

  • Erik,

    If you are using the 1.0 Silicon revision (ROM ID: D800K002), the ROM boot loader cannot correctly initialize the mDDR on the LOGIC SoM.  You can work around this limitation by replacing the EMIF3DDR section of the INI file with the following two sections (adjust the values as necessary):

    ; This section allows setting up the PLL1. Usually this will
    ; take place as part of the EMIF3a DDR setup. The format of
    ; the input args is as follows:
    ;           |------24|------16|-------8|-------0|
    ; PLL1CFG0: |    PLLM| POSTDIV| PLLDIV1| PLLDIV2|
    ; PLL1CFG1: |           RSVD           | PLLDIV3|
    [PLL1CONFIG]
    PLL1CFG0 = 0x15010001
    PLL1CFG1 = 0x00000002

    ; This section can be used to configure the PLL1 and the EMIF3a registers
    ; for starting the DDR2 interface on ARM-boot D800K002 devices.
    ;            |------24|------16|-------8|-------0|
    ; DDRPHYC1R: |             DDRPHYC1R             |
    ; SDCR:      |              SDCR                 |
    ; SDTIMR:    |              SDTIMR               |
    ; SDTIMR2:   |              SDTIMR2              |
    ; SDRCR:     |              SDRCR                |
    ; CLK2XSRC:  |             CLK2XSRC              |
    [ARM_EMIF3DDR_PATCHFXN]
    DDRPHYC1R = 0x000000C4
    SDCR = 0x0A034622
    SDTIMR = 0x184929C8
    SDTIMR2 = 0xB80FC700
    SDRCR = 0x00000406
    CLK2XSRC = 0x00000000

     

    If you are using ROM revision 1.1 or later (D800K004 or higher), then the above does not apply.

     

    Regards, Daniel

  • The external wiki page has been updated with the above information that I've provided here.

    Regards, Daniel

     

  • I have a different problem related to this procedure.  I am able to get to the u-boot prompt after booting via UART2, but SPI and ethernet do not appear to be working.  When I type 'sf probe 0', it returns 'Failed to initialize SPI flash at 0:0'.  When I type 'dhcp' after setting the serverip, it returns 'BOOTP broadcast 1' and never returns to the u-boot prompt.  If I load u-boot via jtag with CCS (the same u-boot.bin file used to create the .ais file I used to boot via UART2) and boot from SPI flash, SPI and ethernet behave normally. 

  • I concur. I have the same problem.  After following this procedure, I was able to get the u-boot prompt (thank you!), but the Ethernet appears to stay in "reset".  The connection light flashes at about 0.5 or 1 Hz.  I did not try the SPI as mentioned by Jayarr

  • Two questions:

    1. Which way are the pre-built arm-spi-ais.bin images distributed in the SDK built?

    2. Does this 1.0 silicon revision problem impact the use of 128MB mDDR on the OMAP-L138 SOM with 128MB?

    Thanks!

  • @jayarr and Erik Jones

    I'm not sure what would be causing this.  Have you tried generating the AIS boot images via the AISgen GUI (http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=sprab41b)? The GUI should have all the hooks in place for different ROM versions.

    - Christina

  • @chrisg

    1. I'm not too sure if I understand the question.  What do you mean by "which way"?  The pre-built arm-spi-ais.bin should be SPI boot.

    2. The 1.0 silicon revision (d800k002) only supports DDR2, not mDDR.  Therefore, it should impact the use of 128MB mDDR on the OMAP-L138 SOM.  However, if you use the AISgen GUI and select the correct ROM version, the changes should be transparent for you.  For more information, please refer to page 35 of bootloader appnote, http://focus.ti.com/lit/an/sprab41b/sprab41b.pdf. 

    - Christina

  • I followed the directions on this page:

    http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Flashing_Boot_Images_on_Linux_Without_CCS

    Did the .ais file generated using the AISgen GUI work for you?  I think I have the ROM version correct as I would probably never see the u-boot prompt if the DDR was not initialized correctly. 

     

  • Christina,

    Thanks for your response. I am confused.

    1. I meant which ROM version is the pre-built arm-spi-ais.bin file intended for?
    2. I have two different SOMs from logicpd that are both 1.0 silicon revision parts (d800k002). One has 64MB of mDDR and the other has 128MB of mDDR. The 64MB version appears to work correctly. Is it completely unreliable to use mDDR with this older silicon revision?
    3. I am still looking at AISgen GUI. Is there any further documentation? I am a little unclear about the "ARM Application File" that is required as an input.

    Also, here are the Micron parts that the logicpd board uses:

    64MB MT46H64M16

    128MB MT46H32M16

    http://www.micron.com/products/ProductDetails.html?product=products/dram/mobile_ddr_sdram//MT46H32M16LFBF-6+IT

     

    -Chris

  • chrisg said:

    1. I meant which ROM version is the pre-built arm-spi-ais.bin file intended for?

    I'm not familiar with what was included in the zip file, so I'm not sure which ROM version it was built for.  Maybe someone else can help comment on this.

    chrisg said:

    2. I have two different SOMs from logicpd that are both 1.0 silicon revision parts (d800k002). One has 64MB of mDDR and the other has 128MB of mDDR. The 64MB version appears to work correctly. Is it completely unreliable to use mDDR with this older silicon revision?

    If you create the AIS file from the GUI, it will automatically add the workaround for the 1.0 silicon revision parts.  From a hardware perspective, the mDDR is completely functional in 1.0 silicon revision parts.  It's just that the ROM does not initialize the mDDR correctly. 

    chrisg said:

    3. I am still looking at AISgen GUI. Is there any further documentation? I am a little unclear about the "ARM Application File" that is required as an input.

    The bootloader appnote (http://focus.ti.com/lit/an/sprab41b/sprab41b.pdf) should have all the documentation for the AISgen GUI.  If there is something specific that is missing, let me know and I'll forward the feedback to our bootloader team.

    - Christina

  • What sort of application should I specify as the ARM application? Can/should I use U-Boot?

  • You should be able to use U-Boot as the ARM application. 

    - Christina

  • Daniel,

    I am also trying to test a new u-Boot.bin build with a serial boot.    I have not had any success using the AISgen GUI.   The AIS file is generated, and transfers from the pc to the eval board via UART2, CRCs are OK, but uBoot does not run.

    I have noticed that AISgen does not allow me to set the PLLs up as you are recommending without errors.

    The PLL1CFG0 value appears to be setting PLLDIV1 to 0.

    The AISgen GUI does not allow me to do this.     Is setting PLLDIV1 to 0,  what you intended?

    Do you have a procedure for generating an AIS files using AISgen that works for Rev 1 Silicon?