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AM335x GPMC_A12 won't change as expected

Guru 15520 points
Other Parts Discussed in Thread: SEGGER

Hi,

My customer are having a problem with AM335x GPMC.
On their customer board, FPGA are connected to GPMC CS3( 8-bit Non-Multiplex mode ).
The GPMC register configurations are as follow:
********************************************************
GPMC_SYSCONFIG = 0x00000008
GPMC_CONFIG    = 0x00000010
GPMC_IRQENABLE = 0x00000000

GPMC_CONFIG1_3 = 0x00450000
GPMC_CONFIG2_3 = 0x000C0C00
GPMC_CONFIG3_3 = 0x00000000
GPMC_CONFIG4_3 = 0x08050B04
GPMC_CONFIG5_3 = 0x000A0C0C
GPMC_CONFIG6_3 = 0x00000000
GPMC_CONFIG7_3 = 0x00000F41 (CS3 are enabled after all GPMC register settings are done)
*********************************************************

GPMC CS3 are mapped to 0x0100_0000 - 0x01FF_FFFF(16MB).
They are having following problem at single write access.

1.
First they write 0xFF value to 0x01001000 address. Write access are done succcessfully.

2.
Then they write 0xFF value to 0x01000000 address. But it can't write to 0x01000000 address.
Because GPMC_A12 was still '1(High)', it didn't change to '0(Low)' at access time.
So, it is accessing to 0x01000000 address which is not expected address.

3.
Just after above step2, they tried writing 0xFF value to 0x01000000 address again.
GPMC_A12 got changed to '0' and the write access was done successfully.

They tried accessing to other address, but other GPMC_ADDRESS bit will change as expected.
This problem always occur when doing step1 and step2.

Can you please give us an advise for this issue?

best regards,
g.f.

  • Hi g.f,

    What software are they using? I will check the GPMC settings and post if I find something wrong.
  • I have checked this. Here are some notes:

    1. They are running the GPMC at 100MHz. Can they try at a lower speed?
    2. In GPMC_CONFIG3_3 there are no settings for ADV off time. I'm not 100% sure, but this could interfere with correct functioning of the GPMC state machine.
    3. In GPMC_CONFIG6_3 they have enabled cycle to cycle delay, but it's not enabled for accesses on the same chip-select (bit 7). Could they try that too?
  • Hi Biser,

    Sorry for the delay, I was out of office.

    Thank you for the notes. I will ask to my customer to try it.

    By the way, they are setting each registers(PLL, PINMUX, GPMC, etc) from command line.
    They aren't using CCS and TI Emulator.
    They are using SEGGER JTAG emulator and JLINK Commander.

    best regards,
    g.f.