Slow EDMA transfer on EMIF address space.

How are you programming ACNT/BCNT/CCNT?  What synchronization event kicks off the transfers?

thanks for the responce.

we are using below values for a b c counts.

acnt = (16*1024);

bcnt = 1;

ccnt = 1;

and we are manually starting the transfer(cpu).

regards,

satya.

Are there any other transfers happening concurrently, in the whole system ?

Also - can you give a general block diagram which describes the EDMA data path of this audio capture.

There are some rules to follow to get the most optimal EDMA transfers.  Here's a screenshot from the EDMA User Guide:

The default burst size (DBS) is 32 bytes for all of the TCs in DM6467.  So you would need to make ACNT=32 to meet the first critera.  That would also meet the "power of 2" requirement.  Next you need the SRC and DST BIDX values to also be 32 (i.e. consecutive data).  You should now make BCNT=512 to keep the total transfer size the same.  You will also need to change your options to AB-sync instead of A-sync.

Give that a try and let us know how it goes.  If that doesn't give you the performance you need the next thing to explore would be the EMIF settings.

Hi Brad,Varada,

Bard:

I checked the DMA transfer as you suggested. Still i am getting same datarate.

here are the EMIF settings i am using in my application.

       acfg2 = 0
        | ( 0  << 31 )          // selectStrobe
        | ( 0  << 30 )          // extWait
        | ( 10 << 26 )          // writeSetup     
        | ( 20 << 20 )          // writeStrobe    
        | ( 5  << 17 )          // writeHold      
        | ( 10 << 13 )          // readSetup      
        | ( 20 << 7  )   // readStrobe
        | ( 5  << 4  )          // readHold 
        | ( 4  << 2  )          // turnAround
        | ( 1  << 0 );   // asyncSize

Varada:

There are no other transfers happening in the system.

We have an ADC connected directly to the emif Databus. As we dont have any other EMIF devices, we have generated the chip enable from the CS3 line and EMIF READ Signal.

Is there any other EDMA/EMIF read mode where in there it is not required addressing for each word (saving t-states), just reading data like in burst mode.

Please suggest.

Regards,
Satya.

Satya,

Can you please provide the schematic of the ADC to DM6467 EMIF interface.

Regards, Srirami.

Hi Srirami,

as i mentioned earlier only EMIF databus is connected. functionality wise its working ok, but only problem is we are unable to read at required datarate.

Regards,

Satya,

Satya,

Look at "TMS320DM6467 SoC Architecture and Throughput Overview" document at the following link for EDMA throughput numbers:

http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spraaw4b

The EMIF throughput depends on the EMIF configuration (specific to each design). For example, look at the Table 10 (Page 25). We are seeing 8.37MBytes/sec for EMIF->DDR2 transfer with following configuration on our evaluation board, where EMIF is connected to a NOR flash.

– Read time cycle (setup/strobe/hold): 35 (6/26/3)
– Write time cycle (setup/strobe/hold): 20 (6/11/3)
– Data bus width: 16 bits

Above configuration is the best configuration that works with our evaluation board.

For your design, fine tune the EMIF configuration as best as possible. Also, look at the section "4.1 Enhanced Direct Memory Access (EDMA)" in the above document for the factors that affect EDMA throughput.

Regards, Srirami.

Seems like you are limited by your emif settings, not the dma.  Not sure what frequency you are running at, but the emif runs @ pll0 / 4, so if you are @ 600 MHz, each emif clock is 150 MHz.  Adding up your wait states would put you in the 4MHz range, and since you are 16 bit emif, your 8MHz range results are exactly what I would expect.  You will need to reduce your read wait states from 35 to 12 (or so) to achieve your goals.

which is the fastest way to transfer data from the DM6437 to the FPGA if you don't considerate the EMIF interface ?

many thanks.

Simon,

Please open a new post for this question as this is not related to DM6467. That way, it will be reponded effectively.

Regards, Srirami.