Other Parts Discussed in Thread: 66AK2H12
Hi,
We have developed a custom board that uses 66ak2h12 SoC. board is exactly same except we have removed RTC connector. Board is powered up fine and we have monitored powers on fusion usb power controller. Then we tried to connect it through jtag adapter and we successfully connected. xtcievmk2k.gel is running fine and we receive all printing that indicates correct initialization. But when i tried to run DDR3A and DDR3B read/write test code composer shows error. I tried to debug DDR3 using ddr3_debug guide SPRAC04.pdf . Both SDRAM and SO_DIMM failed at leveling. When I physically checked , I found that SOC_DDR3B_EMRESETN and SOC_DDR3A_EMRESETN had 0 volts at both ends. This means SOC is keeping ddr3 in reset constantly. While in EVMK2H (advantech) both show voltage ~1.5 at one end and zero at other end. Why SOC is keeping DDR3 in reset.
