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NAND flash addresses (start, end) in EVMK2H memory map

Other Parts Discussed in Thread: 66AK2H14

Hi. I use the following setup: Info from the Release Notes: MCSDK version 3.0.3. Info from a sticker on my board: EVMK2H Rev 40.

What are the start & end addresses of Nand flash in the EVMK2H memory map?

I assume that using the 'md' command in UBoot would allow me to see the contents of Nand flash - is this assumption correct? If so, I should be able to use your answers in UBoot as follows:  'md address' would show me flash memory contents if 'address' is between the flash start address & the flash end address.

Thanks.

  • Hi,

    You  have to use nand write,  read and erase commands to access the NAND flash from u-boot. Refer below links,

    http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Exploring#Burning_U-Boot_to_NAND_Flash

    http://processors.wiki.ti.com/index.php/Booting_Linux_kernel_using_U-Boot

    Also we recommend you to use latest MCSDK for development. Thank you.

  • Hi Siddhartha,

    Siddhartha said:
    What are the start & end addresses of Nand flash in the EVMK2H memory map?


    If you ask the memory map for NAND, please have a look at the EMIF memory map in the datasheet of 66Ak2H14/12/06, "SPRS866E.pdf ".

    00 3000 0000 00 33FF FFFF 64M EMIF16 CE0
    00 3400 0000 00 37FF FFFF 64M EMIF16 CE1
    00 3800 0000 00 3BFF FFFF 64M EMIF16 CE2
    00 3C00 0000 00 3FFF FFFF 64M EMIF16 CE3

    Siddhartha said:
    I assume that using the 'md' command in UBoot would allow me to see the contents of Nand flash - is this assumption correct? If so, I should be able to use your answers in UBoot as follows: 'md address' would show me flash memory contents if 'address' is between the flash start address & the flash end address.


    I would recommend to use the "nand dump" to see the content of Nand flash.

    For example:- nand dump < off >
    nand dump 0x20000

  • Thanks for the suggestions Raja & Shankari.

    Regarding the end address of Nand flash & total Nand flash capacity:
    ----------------------------------------------------------------------------------------------------
    I'm looking at a document named XTCIEVMK2X_Technical_Reference_Manual_Rev1_0.pdf.
    I see the info below:

    0x30000000 – 0x33FFFFFF 64M EMIF16 CS2 Data NAND Memory
    0x34000000 – 0x37FFFFFF 64M EMIF16 CS3 Data NAND Memory
    0x38000000 – 0x3BFFFFFF 64M EMIF16 CS4 Data NOR Memory
    0x3C000000 – 0x3FFFFFFF 64M EMIF16 CS5 Data SRAM Memory

    This suggests - there is 64M *2 = 128 MB of Nand flash.

    But Sec 2.10 of XTCIEVMK2X_Technical_Reference_Manual_Rev1_0.pdf has the info shown below:
    "The SoC EMIF-16 interface connects to one 4Gbit (512MB) NAND flash device ..."
    So I can't determine the correct end address & capacity for Nand flash. Please let me know.

    Thanks.
  • Hi Siddhartha,

    Generally we won't use MMR address of NAND while accessing the flash instead we use 0x0000 0000 to 0x2000 0000 (512MiB)

    We use this address ( 0x30000000 – 0x33FFFFFF ) while accessing the NOR flash and SRAM etc.,

    Please refer to the following TI UG. (chapter 1.2)

    Note—The 64MB limit per chip select applies only for asynchronous memories
    that use the EMIF16 address bus for addressing - typically ASRAM and NOR
    flash. NAND flash uses the data bus as a multiplexed data/address bus and does
    not use EMIF16 address pins for addressing (Only CLE and ALE signals use
    the address bus. Refer to Section 3.1 ‘‘NAND Flash Mode’’ for more details).
    So NAND Flash > 64MB can be supported on one chip select.

    www.ti.com/.../sprugz3a.pdf

  • Thanks Shankari & Raja. My questions have been answered.