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DDR3 PHY WR_xxx Register Setting

Hi

My customer try to configure manually the DDR PHY Register. 
They produced the set value in the software leveling, but would like to fine adjustment.

And so I have a question.
They change the following registers Are these not affected "Read Timing" ?

WR_DQS_SLAVE RATIO
WR_DATA_SLAVE_RATIO



Best Regards,
Taka