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DDR initialization in AM437x. Unabloe to access entire DDR memory

Other Parts Discussed in Thread: SYSBIOS

Hi ,

We are using AM437x IDK with ccs6.1 and "am437x_sysbios_ind_sdk_2.0.0.1" SDK .

When we run any of  the sample project in debug mode(using standard gel file provided with SDK C:\ti\ccsv6\ccs_base\emulation\boards\idk_am437x\gel), we can only acces DDR memory locations from 0x80000000-0x87FFFFFF.

 Do we need to enable something else in gel file to access full DDR memory(1 GB)?

attached is the memory browser view in ccs

regards,

Jinu

  • Hi,

    We are using AM437x IDK boards and using am437x_sysbios_ind_sdk_2.0.0.1 .

    We need to check whether the entire DDR3 memory can be accessible or not. So added the following code inside boot-loader code.(sbl_main.c file)

    /* Configures PLL and DDR controller*/
    SBLPlatformConfig();

    CONSOLEUtilsPuts("Performing DDR Test...\r\n\n");

    ddr_test();

    /* Copies application from non-volatile flash memory to RAM */

    SBLCopyImage(&gSblEntryPoint);

    CONSOLEUtilsPuts("Jumping to ETA Application...\r\n\n");

    void ddr_test(void)

    {

          unsigned int var1;
          unsigned int var2;
          unsigned int var4;
          unsigned char result = 1;

           /* Walking 1's */

          CONSOLEUtilsPrintf("DDR3 Test for walking one's is performed at addr:0x87FFFFFF\n\r");
          var2 = 0;
          var4 = 0xFFFFFFFF;
          for( var1 = 0x0; var1 < 32; var1++ )
          {
             *(int*)( 0x87FFFFFC ) = var4;

              var2 = *(int*)( 0x87FFFFFC );
             if( var2 != var4)
             {
                CONSOLEUtilsPrintf("DDR3 Test for walking one's Failed at addr:0x87FFFFFC\n\r");
                result = 0;
           }
           var2 = 0;
           var4 = var4 >> 2;
      }
     if(result != 0)
    {
      CONSOLEUtilsPrintf("DDR3 Test for walking one's passed at addr:0x87FFFFFC\n\r");
    }

    }

    Using the above code we are able to test memory regions between 0x80000000 to 0x87FFFFFC region.

    But if we try to write above this, compiler is getting struck at that point. Can you please let us know what else we need to change?

    We think that the bootloader initializes the entire DDR memory by calling SBLPlatformConfig() function.

    Regards,

    Jinu

  • Hi,

    We are using AM437x IDK bootloader. So please clarify whether the bootloader project properly initialize DDR or not?

    Regards,

    Jinu

  • Jinu,

    I just tried this on my AM437x IDK and was able to access the region you had trouble with. Please try the gel located at C:\ti\sysbios_ind_sdk_2.1.1.2\sdk\tools\gel\AM437x\AM437x_EVMs.gel

    There is a new release of the IND SDK (2.1.1.2) at http://www.ti.com/tool/sysbiossdk-ind-sitara

    Run the GEL scripts>AM43xx_system_initialization>AM43xx_IDK_EVM_INITIALIZATION and see if this helps.

    Lali

  • Hi Lali,

    Thanks for the Reply,

    I tried with the new SDK, Still observing the same issue. In debug mode, we run the default example provided for DDR test.

    the gel file used was ..\..\emulation\boards\evmam437x\gel\evmam437x.gel file, we are able to load the program 

    As you can see above the memory after 0x87ffffff is not available.

    So we  i changed the gel file in target_config->EVMAM437X.ccxml  to           C:\ti\sysbios_ind_sdk_2.1.1.2\sdk\tools\gel\AM437x\AM437x_EVMs.gel

    but we are getting the following error

    Do i need to change something else?

    My project setting is as shown below

  • Hi lali,
    When I import a example project to work space, which configuration i have to use?
    if I select device variant as AM437x IDK ,EVMAM437x or AM437, what impact it can create?
    Can this cause the above mentioned problem ?

    Regards,
    JInu
  • Hi Lali,

    What i observed is if I comment the MMUConfigAndEnable() function, i can access full DDR memoy.

    In example_utils_mmu.c file, it is mentioned that for DDR,

    #define NUM_SECTIONS_DDR (128U)

    mmuMemRegionConfig_t regionDdr
    {
    START_ADDR_DDR,
    NUM_SECTIONS_DDR, /* Number of pages */
    1U*MEM_SIZE_MB, /* Page size - 1MB */
    MMU_MEM_ATTR_NORMAL_NON_SHAREABLE,
    MMU_CACHE_POLICY_WB_WA, /* Inner */
    MMU_CACHE_POLICY_WB_WA, /* Outer */
    MMU_ACCESS_CTRL_PRV_RW_USR_RW,
    FALSE /* Non Secure memory */
    }

    So the number of DDR sections is given as 128 MB. if I call the MUConfigAndEnable() function from main.c, it will limit the ddr size to 128 MB.
    What is the reason behind this MMU limiting DDR memory size? Also, why we have added only the following 4 regions in MMU and not included GPMC module?

    MMUMemRegionMap(&regionDdr, (uint32_t*)pageTable);
    MMUMemRegionMap(&regionOcmc, (uint32_t*)pageTable);
    MMUMemRegionMap(&regionDev, (uint32_t*)pageTable);
    MMUMemRegionMap(&regionQspi, (uint32_t *)pageTable);


    Regards,
    Jinu Jacob
  • Hi Jinu,

    I'm awaiting some feedback from the development team regarding your questions, and will update once I have more details.

    Lali
  • Jinu,

    Can I merge this thread with this one? https://e2e.ti.com/support/embedded/starterware/f/790/t/478103.

    The questions seem similar.

    Lali

  • Hi lali,

    Thanks for the update. You can merge the above one.

    DDR memory limited to 128 in bootloader project also.

    We are waiting for your feedback on this

  • Jinu,

    Generic idea might be to just demonstrate the application which require some portion of memory, and one more case could be not all the platforms have same amount of DDR. Instead of making the DDR size board dependent, it is simple to just use 1 bank of memory to demostrate the application accross all the boards.

    -Murali Krishna