Is the Write Protect Signal (WPn) controlled like a GPIO output by the GPMC_CONFIG[4].WRITEPROTECT bit?
If not so, is there the timing information for the Write Protect Signal (WPn)?
Best regards,
Daisuke
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Is the Write Protect Signal (WPn) controlled like a GPIO output by the GPMC_CONFIG[4].WRITEPROTECT bit?
If not so, is there the timing information for the Write Protect Signal (WPn)?
Best regards,
Daisuke
Hi Biser-san,
Thank you for your reply.
When the WRITEPROTECT bit is 0h, is the WP output pin held low (active) during a idle cycles?
Best regards,
Daisuke