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6747: EMIFA max read rate?

If EMIFA was connected to a very fast 16-bit device (FIFO capable of exceeding any DSP timing specs), what is the maximum read rate that could be expected?  Please assume a 300 MHz 6747.  Can SETUP and HOLD be set to 0 so that only STROBE time is required, basically it would go into a burst-like mode.  The burst mode is available with the 5509A EMIF and I am surprised to see it not included on the 6747.  Am I missing its documentation somewhere?  thanks

  • The documents you want to read are the datasheet and the EMIFA User's Guide. Different DSPs support different mixes of peripherals depending on what the spec writers considered to be the requirements for each DSP.

    The C6747 EMIFA support NOR Flash/SRAM, NAND Flash, and SDRAM.

    In Async mode, the fastest cycle time is 3 EMA_CLK cycles. No, you cannot set any of the three timing regions less than 1 each.

    Perhaps the SDRAM interface would work for you, but it has the added baggage of being an SDRAM interface and not a pure burst, so there would be RAS/CAS cycles, etc.

    What else did you like about the C5509A?

     

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