66AK2H14 Hyperlink issue with TMS320C6678

Hi,

Have you tested the both C6678 and K2H14 devices Hyperlink transfer on loopback mode?

I have tested the Hyperlink transfer between two K2H14 devices and two C6678 devices, but not tested between K2H12 and C6678 combination. Have you using the default hyperlink example code on C6678 device for your testing.

Thanks,

Hi,

Please find our reply on your query

1.Have you tested the both C6678 and K2H14 devices Hyperlink transfer on loopback mode?

Reply : We tested 6678 & K2H14 hyperlink transfer in internal loopback . We are facing the issue on the external loopback mode (i.e K2H14 to 6678)

2.Have you using the default hyperlink example code on C6678 device for your testing.

We are using 6678 example for 6678 processor and H14 example code for H14 processor. We have modified the example code for both 6678 & H14 as per customized clock (156.25MHz) and also we have changed the code for External Data Transfer.


Regards,
Sakthi.A

Hi,

Please share your test projects, I will try to test the same on my setup and try to resolve your issue.

Thanks,

Hi,

The project folder size is 256MB. Please share your mail id. We will send using google drive . moreover the changes are in clock settings as per our requirement in example code.

Regards,
Sakthi.A

Hi,

Please share only the modified source file on the both DSP MCSDK example project.

Thanks,

hyplnk.zipHi,

Please use the attached folder in 

C:\ti\pdk_keystone2_3_00_03_15\packages\ti\drv

and in the example when we are trying to access the remote register of C6678 through K2H14 the code is geting hanged.

hyplnkLLDIFace.c --> 1306 Line number

if (Hyplnk_readRegs (handle, location, &regs) != hyplnk_RET_OK)

 Please share the latest Keystone II SERDES configuration for Hyperlink.pdf

 Please let me know your feedback.

Regards,

Sakthi.A

Hi,

Please let me know any update on modified source code. Have you tested.


Regards,
Sakthi.A

Hi Ganapathi,

Any update on our Hyperlink source code. We are awiting for your valuable inputs.

Regards,
Sakthi.A

HI Ganapathi,

  Please find below the debug log message. Please let me the problem.

  

DSP - 1
---------

[C66xx_0] Version #: 0x02000009; string HYPLNK LLD Revision: 02.00.00.09:Nov 24 2013:17:32:20
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled. You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000cc305
system setup worked
About to set up HyperLink Peripheral
============================Hyperlink Testing Port 0
========================================== begin registers before initialization ===========
Revision register contents:
Raw = 0x4e902101
Status register contents:
Raw = 0x00003004
Link status register contents:
Raw = 0x00000000
Control register contents:
Raw = 0x00000001
Control register contents:
Raw = 0x00000000
============== end registers before initialization ===========
============== begin registers after initialization ===========
Status register contents:
Raw = 0x04400005
Link status register contents:
Raw = 0xccf00cf0
Control register contents:
Raw = 0x00006200
============== end registers after initialization ===========
Waiting 5 seconds to check link stability
Link seems stable
About to try to read remote registers

DSP - 2
---------

[C66xx_8] Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000cc305
============== begin registers before initialization ===========
Revision register contents:
Raw = 0x4e901900
Status register contents:
Raw = 0x00002004
Link status register contents:
Raw = 0x00000000
Control register contents:
Raw = 0x00000001
Control register contents:
Raw = 0x00000000
============== end registers before initialization ===========
Waiting for other side to come up ( 0)
SERDES_STS (32 bits) contents: 0x03060d1f; lock = 1
Waiting for other side to come up ( 1)
Waiting for other side to come up ( 2)

Regards,

Sakthi.A

Hi,

Is the [C66xx_0] is core 0 of C6678 device and [C66xx_8] is core 0 of 66AK2H14 device? Have you using gel file for initialize the both devices?

As per your debug log core 0 is trying to read the remote registers and K2H core 0 is waiting for other side link up. Are you running the test application on both corepacs at same time?

Thanks,

Hi,

    Please find our reply on your query

1.  Is the [C66xx_0] is core 0 of C6678 device and [C66xx_8] is core 0 of 66AK2H14 device?

 CORNET : NO , [C66xx_0] is core 0 of  66Ak2H14 device and [C66xx_8] is core 0 of C6678

2.Have you using gel file for initialize the both devices?

CORNET : Yes we are using the gel file for both the Devices.

3.As per your debug log core 0 is trying to read the remote registers and K2H core 0 is waiting for other side link up?

CORNET : As per our debug log core 0 of  66Ak2H14 device is trying to the remote registers of C6678. Even 6678 is linked up.

4.Are you running the test application on both corepacs at same time?

CORNET : Yes we are running the test application on both the corepacs at the same time

FYI : We can able to perform the Data transfer from the C6678 to 66Ak2H14 device.

Regards,

Sakthi.A

Hi Ganapthi,

Have you gone through our log. Any update.

Are you located in Bangalore TI. We need your help in debugging the Hyperlink problem. We will come with the board to TI office. Can you please spare your time for 1 or 2 day with us. If Yes,please share your availability?

This is because that we are under tremendous pressure to prove the board .


Regards,
Sakthi.A

Hi,

For my understanding, Hyperlink part is properly configured on C6678 side and waiting for other side link up. Could please share the debug log for "K2H14 as Receiver and C6678 as Transmitter" test case?

Thanks,

Hi,

K2H14 as Receiver and C6678 as Transmitter" test case?

CORNET : Please refer my earlier post .Its working for K2H14 as Receiver and C6678 as Transmitter" test case.

Please confirm your availability and will visit your office.

Regards,
Sakthi.A

Hi,

Any update on our Hyperlink issue.

Regards,
Sakthi.A