Hi,
I have 3 SPI devices in my hardware architecture. They use SPI0, 2, and 1 respectively.
RTOS has SPI 0 and 2 configured aleady. I tried to add SPI1, but I got the following error message. How do I configure SPI1 correctly?
Error from Console :
{module#48}: line 143: error {id:0x110000, args:[0x13, 0x0]}
Starting ESU Firmware ...
Level 0, 1mS
ng execution...
{module#30}: line 202: error {id:0x10000, args:[0x5730, 0x5734]}
xdc.runtime.Error.raise: terminating execution
Stack Dump :
<terminated>ESU_Firmware_9252 [Code Composer Studio - Device Debugging]
ESU_Firmware_9252 [Code Composer Studio - Device Debugging]
Stellaris In-Circuit Debug Interface/CORTEX_M4_0 (Suspended)
loader_exit() at exit.c:52 0x00005C44
abort() at exit.c:117 0x00005C4E
xdc_runtime_System_abort__E(unsigned char *)() at System.c:100 0x00006BD0
xdc_runtime_Error_policyDefault__E(struct xdc_runtime_Error_Block *, unsigned short, unsigned char *, int, unsigned int, int, int)() at Error.c:165 0x00002842
xdc_runtime_Error_raiseX__E(struct xdc_runtime_Error_Block *, unsigned short, unsigned char *, int, unsigned int, int, int)() at Error.c:114 0x00006B7C
xdc_runtime_Assert_raise__I(unsigned short, unsigned char *, int, unsigned int)() at Assert.c:34 0x00005728
ti_sysbios_knl_Semaphore_pend__E(struct ti_sysbios_knl_Semaphore_Object *, unsigned int)() at Semaphore.c:208 0x00000904
SPITivaDMA_transfer(struct SPI_Config *, struct SPI_Transaction *)() at SPITivaDMA.c:534 0x0000522E
SPI_transfer(struct SPI_Config *, struct SPI_Transaction *)() at SPI.c:122 0x0000720A
read9252SPIData(unsigned char *)() at spiloopback.c:485 0x00001AB0
<...more frames...>
In mu .c fle :
masterSpi = SPI_open(Board_SPI_16bit_DAC, &masterSpiParams);
In my Board.h file :
#define Board_SPI_16bit_DAC EK_TM4C123GXL_SPI1
In my EK_TM4C123GXL.h file :
typedef enum EK_TM4C123GXL_SPIName {
EK_TM4C123GXL_SPI0 = 0,
EK_TM4C123GXL_SPI2,
EK_TM4C123GXL_SPI3,
EK_TM4C123GXL_SPI1,
EK_TM4C123GXL_SPICOUNT
} EK_TM4C123GXL_SPIName;
In my EK_TM4C123GXL.c file :
/*
* =============================== SPI ===============================
*/
/* Place into subsections to allow the TI linker to remove items properly */
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(SPI_config, ".const:SPI_config")
#pragma DATA_SECTION(spiTivaDMAHWAttrs, ".const:spiTivaDMAHWAttrs")
#endif
#include <ti/drivers/SPI.h>
#include <ti/drivers/spi/SPITivaDMA.h>
/* SPI objects */
SPITivaDMA_Object spiTivaDMAObjects[EK_TM4C123GXL_SPICOUNT];
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_ALIGN(spiTivaDMAscratchBuf, 32)
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma data_alignment=32
#elif defined(__GNUC__)
__attribute__ ((aligned (32)))
#endif
uint32_t spiTivaDMAscratchBuf[EK_TM4C123GXL_SPICOUNT];
/* SPI configuration structure */
const SPITivaDMA_HWAttrs spiTivaDMAHWAttrs[EK_TM4C123GXL_SPICOUNT] = {
{
SSI0_BASE,
INT_SSI0,
~0, /* Interrupt priority */
&spiTivaDMAscratchBuf[0],
0,
UDMA_CHANNEL_SSI0RX,
UDMA_CHANNEL_SSI0TX,
uDMAChannelAssign,
UDMA_CH10_SSI0RX,
UDMA_CH11_SSI0TX
},
{
SSI2_BASE,
INT_SSI2,
~0, /* Interrupt priority */
&spiTivaDMAscratchBuf[1],
0,
UDMA_SEC_CHANNEL_UART2RX_12,
UDMA_SEC_CHANNEL_UART2TX_13,
uDMAChannelAssign,
UDMA_CH12_SSI2RX,
UDMA_CH13_SSI2TX
},
{
SSI3_BASE,
INT_SSI3,
~0, /* Interrupt priority */
&spiTivaDMAscratchBuf[2],
0,
UDMA_SEC_CHANNEL_TMR2A_14,
UDMA_SEC_CHANNEL_TMR2B_15,
uDMAChannelAssign,
UDMA_CH14_SSI3RX,
UDMA_CH15_SSI3TX
}
};
const SPI_Config SPI_config[] = {
{&SPITivaDMA_fxnTable, &spiTivaDMAObjects[0], &spiTivaDMAHWAttrs[0]},
{&SPITivaDMA_fxnTable, &spiTivaDMAObjects[1], &spiTivaDMAHWAttrs[1]},
{&SPITivaDMA_fxnTable, &spiTivaDMAObjects[2], &spiTivaDMAHWAttrs[2]},
{NULL, NULL, NULL},
};
/*
* ======== EK_TM4C123GXL_initSPI ========
*/
void EK_TM4C123GXL_initSPI(void)
{
/* SPI0 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
/* Need to unlock PF0 */
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5);
/* SPI1 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);
/* Need to unlock PF0 */
GPIOPinConfigure(GPIO_PF0_SSI1RX);
GPIOPinConfigure(GPIO_PF1_SSI1TX);
GPIOPinConfigure(GPIO_PF2_SSI1CLK);
GPIOPinConfigure(GPIO_PF3_SSI1FSS);
GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
/* SSI2 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
GPIOPinConfigure(GPIO_PB4_SSI2CLK);
GPIOPinConfigure(GPIO_PB5_SSI2FSS);
GPIOPinConfigure(GPIO_PB6_SSI2RX);
GPIOPinConfigure(GPIO_PB7_SSI2TX);
GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5 |
GPIO_PIN_6 | GPIO_PIN_7);
/* SSI3 */
/*
* NOTE: TI-RTOS examples configure pins PD0 & PD1 for SSI3 or I2C3. Thus,
* a conflict occurs when the I2C & SPI drivers are used simultaneously in
* an application. Modify the pin mux settings in this file and resolve the
* conflict before running your the application.
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);
GPIOPinConfigure(GPIO_PD0_SSI3CLK);
GPIOPinConfigure(GPIO_PD1_SSI3FSS);
GPIOPinConfigure(GPIO_PD2_SSI3RX);
GPIOPinConfigure(GPIO_PD3_SSI3TX);
GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
EK_TM4C123GXL_initDMA();
SPI_init();
}