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individuallly disabling OMAP-L138 peripherals

Other Parts Discussed in Thread: OMAP-L138

Hello,

We have an application where we need to either disable unused OMAP-L138 peripherals, or else somehow explain that they won't interfere with normal operation.

I have figured out how to disable most of the unused peripherals, but I can't find any way to individually disable the peripherals below without also disabling some peripherals we need. I thought about trying to disable them by disabling the specific clocks that they use, but after looking at SRUH77A table 8-1, I see this would also disable perihperals we need.  Any ideas how we can individually disable the peripherals below? (or explain in a credible way that they are gauranteed to not intefere with our application?)

ETM_ETB

Embedded Trace Macrocell / Embedded Trace Buffer

McASP

Multichannel Audio Serial Port

McBSP

Multichannel Audio Serial Port

I2C

Inter-Integrated Circuit Serial Ports

LCDC

LCD Controller

VPIF

Video Port Interface

eHRPWM

Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)

eCAP

Enhanced Capture Peripheral

USB1_1_OHCI

Universal Serial Bus Host Controller

EMAC

Ethernet Media Access Controller

  • Matthew,

    Disabling the SYSCLK would clock gate the peripherals associated with that particular SYSCLK. You may need to use PSC controller to disable the individual peripheral power and/or clock. Please refer chapter 9 Power and Sleep Controller (PSC) in device TRM (SPRUH77A) for more details.

    Regards,
    Senthil
  • Okay, thanks. I couldn't see before how to disable individual modules with the MDCTLn registers, but now I see. Thanks again.
  • Hi Mathew Mulvey,

    In software , you can disable modules like below.

    #define PSC_MDCTL_NEXT_DISABLE      (0x00000002u)
    
    #define SOC_PSC_1_REGS                      (0x01E27000)
    
    #define PSC_MDCTL(n) (0xA00 + (n * 4))
    
    #define PSC_MDCTL_NEXT         (0x0000001Fu)
    
    #define PSC_PTCMD (0x120)
    
    #define PSC_PTCMD_GO0          (0x00000001u)
    
    #define PSC_PTSTAT_GOSTAT1     (0x00000002u)
    
    #define PSC_MDSTAT_STATE       (0x0000003Fu)
    
    void ModuleClkDisable()
    
    {
    
    //function call
    
    // According to the modules, change the module ID. Here the Module ID is "1" for 1 USB0 (USB2.0)
    
    PSCModuleControl(SOC_PSC_1_REGS,1, 0, PSC_MDCTL_NEXT_DISABLE);
    
    }
    
    // function definition
    
    int PSCModuleControl (unsigned int baseAdd, unsigned int moduleId,
    
                            unsigned int powerDomain, unsigned int flags)
    
    {
    
       volatile unsigned int timeout = 0xFFFFFF;
    
       int    retVal = 0;
    
       unsigned int    status = 0;
    
       HWREG(baseAdd +  PSC_MDCTL(moduleId)) = (flags & PSC_MDCTL_NEXT);
    
       if (powerDomain == 0)
    
       {
    
           HWREG(baseAdd + PSC_PTCMD) = PSC_PTCMD_GO0;
    
       }
    
       else
    
       {
    
           HWREG(baseAdd + PSC_PTCMD) = PSC_PTCMD_GO1;
    
       }
    
       if (powerDomain == 0)
    
       {
    
           do {
    
               status = HWREG(baseAdd + PSC_PTSTAT) & PSC_PTSTAT_GOSTAT0;
    
           } while (status && timeout--);
    
       }
    
       else
    
       {
    
           do {
    
               status = HWREG(baseAdd + PSC_PTSTAT) & PSC_PTSTAT_GOSTAT1;
    
           } while (status && timeout--);
    
       }
    
       if (timeout != 0)
    
       {
    
           timeout = 0xFFFFFF;
    
           status = flags & PSC_MDCTL_NEXT;
    
           do {
    
               timeout--;
    
           } while(timeout &&
    
                   (HWREG(baseAdd + PSC_MDSTAT(moduleId)) & PSC_MDSTAT_STATE) != status);
    
       }
    
       if (timeout == 0)
    
       {
    
           retVal = -1;
    
       }
    
       return retVal;
    
    }

  • Okay thanks. 

    using the MDCTL registers solved most of my problem.  The only module I still can't see how to disable is the "Embedded Trace Macrocell / Embedded Trace Buffer" module in the ARM core.  It is not controlled by the MDCTL registers.  Any ideas how to disable that one?

    - Matt.

     

  • Matt

    No control to gate the clocks to the ETB buffer etc.
    The software/user controllable modules that you can control clock gating is listed in PSC chapter Table 9-1 and 9-2.

    From a power perspective the consumption for this block will be negligible so you don't have to worry about it IMHO.

    Regards

    Mukul

  • Thanks for your response Mukul. Unfortunately, power consumption is not our only concern. Our customer wants us to disable every unused component, or show some proof that it won't interfere with normal operation of the application in some way. Any ideas?
  • Matthew,

    I don't think we have any solution to disable ETM/ETB as it is internal to the ARM subsystem. I believe it would not affect the execution of your application in any way.

    Regards,
    Senthil
  • Hi
    You can read up about the ETB buffer on ARM website or high level info on our processor wiki
    processors.wiki.ti.com/.../Embedded_Trace_Buffer
    It is an IP for the debug/analysis data - if the customer is not planning to have a JTAG port or enable debug features etc , it should be a don't care in the actual end application/production system and will not interfere with normal operations.
    Regards
    Mukul