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GPMC memory mapped chip select AM437X

Ash P
Expert 1570 points

Hi Forum,

We are using an am437x device and have connected to two slave fpga's. Both are 16 bits wide. Are there any examples of how I could be able to do this. I am using kernel version 3.14.43 . How do I reconfigure the device tree for achieving this. Are there any c examples which i can use for reference to build on from.

Regards

-Ash

  • 0
    TI__Guru**** 393215 points
    Hi,

    You have to use two chip-select regions. GPMC is memory mapped from address 0x0000_0000 to 0x1FFF_FFFF, with the note that the first 1MB of address space 0x0-0xFFFFF is inaccessible externally. See section 9.1.3.3.8.1 in the AM437X TRM Rev. D on how to configure chip-select base address and region size.
  • 0 in reply to Biser Gatchev-XID
    Expert 1570 points
    Thanks For the reference,

    Are there any c examples for me to do this from kernel side ?? We are currently evaluating in (am437x gp evm).

    do i need to make any changes in the dts file ??

    here is my GPMC section in my dts file if that can help

    &gpmc {
    status = "okay"; /* Disable eMMC when enabling GPMC/NAND */
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&nand_flash_x8_default>;
    pinctrl-1 = <&nand_flash_x8_sleep>;
    ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
    nand@0,0 {
    reg = <0 0 4>; /* device IO registers */
    ti,nand-ecc-opt = "bch16";
    ti,elm-id = <&elm>;
    nand-bus-width = <8>;
    gpmc,device-width = <1>;
    gpmc,sync-clk-ps = <0>;
    gpmc,cs-on-ns = <0>;
    gpmc,cs-rd-off-ns = <40>;
    gpmc,cs-wr-off-ns = <40>;
    gpmc,adv-on-ns = <0>;
    gpmc,adv-rd-off-ns = <25>;
    gpmc,adv-wr-off-ns = <25>;
    gpmc,we-on-ns = <0>;
    gpmc,we-off-ns = <20>;
    gpmc,oe-on-ns = <3>;
    gpmc,oe-off-ns = <30>;
    gpmc,access-ns = <30>;
    gpmc,rd-cycle-ns = <40>;
    gpmc,wr-cycle-ns = <40>;
    gpmc,wait-pin = <0>;
    gpmc,bus-turnaround-ns = <0>;
    gpmc,cycle2cycle-delay-ns = <0>;
    gpmc,clk-activation-ns = <0>;
    gpmc,wait-monitoring-ns = <0>;
    gpmc,wr-access-ns = <40>;
    gpmc,wr-data-mux-bus-ns = <0>;
    /* MTD partition table */
    /* All SPL-* partitions are sized to minimal length
    * which can be independently programmable. For
    * NAND flash this is equal to size of erase-block */
    #address-cells = <1>;
    #size-cells = <1>;
    partition@0 {
    label = "NAND.SPL";
    reg = <0x00000000 0x00040000>;
    };
    partition@1 {
    label = "NAND.SPL.backup1";
    reg = <0x00040000 0x00040000>;
    };
    partition@2 {
    label = "NAND.SPL.backup2";
    reg = <0x00080000 0x00040000>;
    };
    partition@3 {
    label = "NAND.SPL.backup3";
    reg = <0x000c0000 0x00040000>;
    };
    partition@4 {
    label = "NAND.u-boot-spl-os";
    reg = <0x00100000 0x00080000>;
    };
    partition@5 {
    label = "NAND.u-boot";
    reg = <0x00180000 0x00100000>;
    };
    partition@6 {
    label = "NAND.u-boot-env";
    reg = <0x00280000 0x00040000>;
    };
    partition@7 {
    label = "NAND.u-boot-env.backup1";
    reg = <0x002c0000 0x00040000>;
    };
    partition@8 {
    label = "NAND.kernel";
    reg = <0x00300000 0x00700000>;
    };
    partition@9 {
    label = "NAND.file-system";
    reg = <0x00a00000 0x1f600000>;
    };
    };
    };



    Regards
    -Ash
  • 0 in reply to Ash P
    TI__Guru**** 393215 points
    I have asked the Linux team about the DTS. This section you have posted is for NAND memory and you won't be able to use it directly for parallel data access.
  • 0 in reply to Biser Gatchev-XID
    Expert 1570 points
    Hi Biser,

    Any feed back or information from the linux team ??? I have not herd anything from them.

    Regards
    -Ash
  • 0 in reply to Ash P
    TI__Guru**** 393215 points
    They will post directly here when feedback is available.
  • 0 in reply to Biser Gatchev-XID
    TI__Guru**** 161600 points
    Hi,

    Sorry for the delayed response.

    No, there are no ready to use examples for GPMC. In your case you need to define two chip selects, you've already defined on that will use fpga1 as nand-like device. To add the other chip select, i.e. cs1, you need to add it in the "ranges=" parameter & then define the device connected to it. The skeleton of the code should be something like:

    ranges = <0 0 0 0x01000000>,
    <"cs_number" 0 "physical address of mapping" "size">;
    then after
    nand@0,0 {
    .....................
    };

    add:

    ethernet@"cs_number",0 {
    reg=<"cs_number", 0, "size of the memory mapped for the device">;
    <all other settings according to your use case>
    };

    Hope this helps.

    Best Regards,
    Yordan