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Programming PLL Controllers on OMAP-L1x8/C674x/AM18xx

Other Parts Discussed in Thread: OMAP-L138

All:

When using the SYS_CLK_CALC_OMAP-L138_C674X_AM18X-v1p3.xls  spreadsheet, it appears that a 50 MHz external square wave is not accepted (even though it is a valid option).

However, to use the OMAP-L138-EP part, it appears that an input clock of 45 MHz would allow for a Max frequency of 345 MHz to be generated, and it would also allow a 115 MHz EMIFA clock to be generated. (148 MHz max)

It would also allow DDR2 memory to be attached and run at 150 MHz (similar to the TMDSLCK138 DDR2 memory).

Is there a better choice of input clock when running with the OMAP-L138-EP part?