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C6701 ROM Boot Process

Gi Gi
Intellectual 280 points

I want to have the C6701 use the ROM boot process with external non-volatile asynchronous MRAM, ideally only 16-bits wide.  (MRAM is like non-volatile SRAM.)

The EMIF Reference Guide (SPRU266E) states that CE0 must have a 32-bit width.   -" the C620x/C670x EMIF supports 32-bit-wide ASRAM, SDRAM, and SBSRAM interface in both big-endian and little-endian modes. CE1 space supports 16 bit and 8 bit read-only memory (ROM) interfaces."

However, the ROM Boot Process uses CE0 according to "TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide SPRU642". The ROM boot process on CE0 does support 16-bit memory if the BOOTMODE pins are so configured.  The question I have is whether a JTAG emulator would be able to program this MRAM memory if it is 16-bits wide.  It seems not.  Is that correct?

Also, assuming a 32-bit MRAM is used on CE0 for the ROM Boot Process, can the MRAM be programmed using typical CCS plus JTAG emulator tools?

Thx

  • 0
    TI__Guru** 116100 points

    The question I have is whether a JTAG emulator would be able to program this MRAM memory if it is 16-bits wide. It seems not. Is that correct?

    Also, assuming a 32-bit MRAM is used on CE0 for the ROM Boot Process, can the MRAM be programmed using typical CCS plus JTAG emulator tools?


    You can flash the code to MRAM through JTAG emulator for both 16 and 32bit MRAM, flashing or programming is not depend with data bus of MRAM, you can modify the code for the different MRAM.

    While booting only, you must to use 32bit MRAM on CE0.
  • 0 in reply to Titusrathinaraj Stalin
    Intellectual 280 points

    Titusrathinaraj Stalin said:
    You can flash the code to MRAM through JTAG emulator for both 16 and 32bit MRAM, flashing or programming is not depend with data bus of MRAM, you can modify the code for the different MRAM.
    While booting only, you must to use 32bit MRAM on CE0.

    To verify - MRAM on CE0 can be flashed regardless of bus width, but the ROM boot process requires that the MRAM be 32-bits wide?  
    What is the meaning of Table 5 in "TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide SPRU642".  It appears that when configuring the BOOTMODE[4:0] pins to b10010, the fourth column defines the Boot Process as "16-bit ROM with default timings". Column 3 of Table 5 also says that with BOOTMODE pins sets to b10010 the "Memory at Address 0" is 32-bit asynchronous with default timing" .   Can you explain this?
    Thank you Titus.