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external resistor for GPMC I/F of AM5728

Michi Yama
Guru 10030 points
Other Parts Discussed in Thread: AM5728

Hi,

I have a question for GPMC I/F.

According to the Vayu EVM schematic,  the external pull down resistance of GPMC_A13 -GPMC_A18 is 10kohm with one bus switch. And the external pull down resistance of GPMC_A19 - GPMC_A16 is 1kohm with two bus switches.

If Flash memory is connected to GPMC port directly(no bus switch), how is resistance for the external pull up/down?

Please advise me.

Best regards,

Michi

  • 0
    TI__Guru**** 393215 points
    Hi,

    The pulldowns on the address lines are necessary only if NOR flash is attached to the GPMC and used for booting. These are necessary to pull addresses higher than A12 low at boot time, as the ROM code initializes only A0 - A12. The value of the resistor such that it will be able to override the internal pullup for the pin (on some pins internal pullups are switched on by default).
  • 0 in reply to Biser Gatchev-XID
    Guru 10030 points
    Dear Biser-san,
    Thank you for your quick reply.

    Please let me know the external pulldown resistor's value for GPMC_Axx pin in detail. 10kohm is better? Or other value is recommendede?

    I appreciate your quick reply.

    Best regards,
    Michi
  • 0 in reply to Michi Yama
    TI__Guru**** 393215 points
    I cannot recommend any value since I don't know any details about the particular schematics. Internal PU/PD values can be calculated from the "Iin with pullup enabled" resp. "Iin with pulldown enabled" parameters in the DC electrical characteristics. Typical values are 18kOhm at 1.8V or 33kOhm at 3.3V, but you will see that min/max currents have a wide range, so this should be taken in consideration when doing calculations.
  • 0 in reply to Biser Gatchev-XID
    Expert 1985 points

    Hi Biser,

    To complete my understanding on GPMC NOR Boot, external Pull downs are not necessary on AM5728 SR 2.0 when sysboot[15]  is set to 0. I also noticed that all the GPMC address lines have internal pull downs by default and hence external PDs are not necessary in this case of sysboot[15] = 0.

    The external PD are necessary only if the sysboot[15] is set to 1 as this disables the internal pull downs on GPMC[N:19] n > 19 to max GPMC size.  Please confirm my understanding.

    I am referring to Table 33-5 in section 33.2.4 Sysboot Configuration of the AM5728 TRM "SPRUHZ6F.pdf".

    Thanks,

    Shareef

  • 0 in reply to Shareef
    TI__Guru**** 393215 points
    Yes, this is correct and valid only for Silicon Revision 2.0 devices.
  • 0 in reply to Biser Gatchev-XID
    Expert 1985 points
    Thanks Biser!