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What can cause DDR3 IO's in tristate?

Other Parts Discussed in Thread: 66AK2H12, UCD9244, UCD9090, CDCM6208

Hi,

We are in process of bring-up of custom board which is exact copy EVMK2H. We see our DDR3 IO's are in tristate i.e Reset is always 0 volts. Output clock is not generated. Address pins are driving constant .775 volts . What can cause this?

Our bring-up plan on brand new custom board is as ( first time powered up 66ak2h12):

1- Program BMC in LM3S2D93 microcontroller.

2- program power-up sequence in UCD9090 and ucd9244 at both address 52d and 78d.

3- connect board through xds emulator with code composer and run gel script. (xtcievmk2k.gel).

is there any thing missing our plan so far?

Don't we need to one-time  program 66ak2h12 with initialization code in ROM or some thing similar to that?

is there any thing special to be done for first time power up?

BR 

  • Suresh,

    The 66AK2H12 has in internal BOOTROM.  The boot mode must be selected by pin strapping.  This is discussed in the Data Manual.  We recommend that you begin development using an emulator and NOBOOT mode.  Then you connect CCS and run a GEL file that configures the DDR3 memory controller and PHY.  This GEL file will need to be modified to match the reference clocks and DDR3 memory devices mounted on your board.  Please refer to the KeyStone II DDR3 Initialization Guide for detailed explanation of this process.  If you wish to boot an operating system such as Linux, you will need to store a second stage bootloader such as UBOOT into an external memory such as NOR FLASH.  The internal BOOTROM can then initialize the boot process form this external NV memory.  note that this second stage bootloader will also require customizations like the GEL file to operate on your board.

    You appear to be a novice user of the 66AK2H12.  We recommend that you purchase an EVM and practice these initialization steps on a known functional board before trying to do this on a board that is just been created that may have electrical or physical issues.

    Tom

  • Hi BR,

    The Bootrom in the K2H is not programmed by the user, it is part of the silicon design. If you are not seeing the DDR3 initialize,  you need to check the basic requirements for the K2H. 

    1) Check all power supplies are generating the proper voltages and are within tolerance.

    2) Check that the CDCM6208 components are programmed correctly and are generating the proper clock frequencies. 

    3) It sounds like you are communicating with CCS. Check the SYSCLKOUT to be sure that the main PLL is programmed to the expected frequency. 

    4) Check that DVDD15 supply at the K2H and at the memories. 

    Regards,

    Bill