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EDMA to the McASP on the TMS320C6747 or OMAP-L137

Other Parts Discussed in Thread: TMS320C6747

Greetings!

Sorry for the repeat posting, in my first one, the format was quite wrong. 

I'm transmitting out of all 28 McASP Channels on the TMS320C6747. I'm working from a loop through example for the same chip.

I've created two dimensional ping pong buffers for both left and right channels of each McASP Channels.

It struck me that, perhaps I could do the 2d transfer with a single EDMA transmit channel, or perhaps one per MCASP, since the  XMT registers are continuous only within a single McASP. 

Question 1: Is it preferable/possible to have a single EDMA multidimensional transmission to the many output registers ? 

Question 2: Also, after reading the link below, I understand that while XBUFn are good registers for transmitting, that if transmitting through the DMA I should use a different address. Where can I find a memory map with these addresses ?

Initially, my intention was to setup a transmission such that each MCASP Channel is handled by it's own EDMA Transfer. If I go about it this way, I realize I'd need to make an additional argument to the setup_edma_pingpong_xmt functions to ensure they wrote to separate PaRAM:

for(int McASP_ind=0; McASP_ind<28; McASP_ind++)
    {
    	setup_edma_pingpong_xmt(xmt_ping_L[McASP_ind][0], xmt_pong_L[McASP_ind][0],
                            	xmt_ping_R[McASP_ind][0], xmt_pong_R[McASP_ind][0], mcasp_xmt_registers[McASP_ind],
				BYTES_PER_SAMPLE, BUF_LENGTH);
    }

Thank you!
  • Ahh I see that the following registers are to be used instead of the XBUFn Registers

    From: processors.wiki.ti.com/.../McASP_Tips
    From: www.ti.com/.../sprs377f.pdf Table 3-4 C6747

    Start Address End Address Size DSP Mem Map/EDMA Mem Map
    0x01D0 0000 0x01D0 0FFF 4k McASP 0 Control
    0x01D0 1000 0x01D0 1FFF 4k McASP 0 AFIFO Control
    0x01D0 2000 0x01D0 2FFF 4k McASP 0 Data
    0x01D0 3000 0x01D0 3FFF
    0x01D0 4000 0x01D0 4FFF 4k McASP 1 Control
    0x01D0 5000 0x01D0 5FFF 4k McASP 1 AFIFO Control
    0x01D0 6000 0x01D0 6FFF 4k McASP 1 Data
    0x01D0 7000 0x01D0 7FFF
    0x01D0 8000 0x01D0 8FFF 4k McASP 2 Control
    0x01D0 9000 0x01D0 9FFF 4k McASP 2 AFIFO Control
    0x01D0 A000 0x01D0 AFFF 4k McASP 2 Data

    The remaining question being, how to distinguish individual channels within an McASP.
  • Hi,

    Two DSP examples from http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL were used for this EDMA 3 project as a starting point:

    Audio example (mcasp directory)

    EDMA_ping_pong_dspL138 (edma directory)

    Both projects were executed on the DSP without any issue. So the audio project was a good starting point for my EDMA3 project to echo back samples from the input lines to output lines.

    Kindly try the above examples.\

    Thanks & regards,

    Sivaraj K