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EDMA can't copy data from DSPL2RAM to SDRAM.

I use EDMA to copy data from DSP memory to SDRAM, It works when copy data from SHRAM, but doesn't work
when copy data from DSPL2RAM to SDRAM.

here is the test code:

#pragma DATA_SECTION(sdram_buf, ".sdram_buf")
float sdram_buf[3];

typedef struct _EDMA{
    unsigned short region;
    unsigned short channel;
    unsigned int src;
    unsigned int dst;
    unsigned int nbytes;
    unsigned short src_inc;
    unsigned short dst_inc;
    unsigned short enable_event;
} EDMA;

EDMA edma_mem;

void setup_all_EDMA()
{
    edma_mem.region = 1;
    edma_mem.channel = 10;
    edma_mem.src_inc = 1;
    edma_mem.dst_inc = 1;
    edma_mem.enable_event = 0;
    EDMA_init(&edma_mem);
}

void EDMA_init(EDMA * e)
{
    edma3ccRegs->ECR |= 1 << (e->channel);
    edma3ccRegs->SECR |= 1 << (e->channel);

    if(e->enable_event){
        edma3ccRegs->EESR = 1 << (e->channel);
    }
    else{
        edma3ccRegs->EECR = 1 << (e->channel);
    }

    edma3ccRegs->DRA[e->region].DRAE |= 1 << (e->channel);

    edma3ccRegs->PARAMSET[e->channel].OPT = CSL_EDMA3CC_OPT_RESETVAL;

    edma3ccRegs->PARAMSET[e->channel].OPT =
        CSL_FMKT(EDMA3CC_OPT_TCINTEN, DISABLE) |
        CSL_FMKT(EDMA3CC_OPT_TCCHEN, DISABLE)  |
        CSL_FMK(EDMA3CC_OPT_TCC, e->channel);
}

void EDMA_clear_completed(EDMA * e)
{
    edma3ccRegs->ICR |= 1 << e->channel;
}

void EDMA_init_repeat(EDMA * e)
{
    Uint16 addr;

    if(e->enable_event){
        CSL_FINST(edma3ccRegs->PARAMSET[e->channel].OPT, EDMA3CC_OPT_STATIC, NORMAL);

        addr = (Uint32)(&edma3ccRegs->PARAMSET[e->channel + 64]) & 0xffff;
        edma3ccRegs->PARAMSET[e->channel].LINK_BCNTRLD =
            CSL_FMK(EDMA3CC_LINK_BCNTRLD_LINK, addr) |
            CSL_FMK(EDMA3CC_LINK_BCNTRLD_BCNTRLD, 0);

        memcpy((void *)&(edma3ccRegs->PARAMSET[e->channel + 64]),
               (void *)&(edma3ccRegs->PARAMSET[e->channel]),
               sizeof(CSL_Edma3ccParamSetRegs));

        edma3ccRegs->PARAMSET[e->channel + 64].A_B_CNT =
                CSL_FMK(EDMA3CC_A_B_CNT_ACNT, 1) |
                CSL_FMK(EDMA3CC_A_B_CNT_BCNT, 0);
    }
    else{
        CSL_FINST(edma3ccRegs->PARAMSET[e->channel].OPT, EDMA3CC_OPT_STATIC, STATIC);
        CSL_FINST(edma3ccRegs->PARAMSET[e->channel].OPT, EDMA3CC_OPT_TCINTEN, ENABLE);
    }
}

void EDMA_init_block_move(EDMA * e, Uint32 src, Uint32 dst, Uint32 nbytes)
{
    e->src = src;
    e->dst = dst;
    e->nbytes = nbytes;
    edma3ccRegs->PARAMSET[e->channel].CCNT = 1;
    edma3ccRegs->PARAMSET[e->channel].SRC_DST_BIDX =
        CSL_FMK(EDMA3CC_SRC_DST_BIDX_SRCBIDX, 0) |
        CSL_FMK(EDMA3CC_SRC_DST_BIDX_DSTBIDX, 0);

    edma3ccRegs->PARAMSET[e->channel].SRC_DST_CIDX =
        CSL_FMK(EDMA3CC_SRC_DST_CIDX_SRCCIDX, 0) |
        CSL_FMK(EDMA3CC_SRC_DST_CIDX_DSTCIDX, 0);

    edma3ccRegs->PARAMSET[e->channel].SRC = e->src;
    edma3ccRegs->PARAMSET[e->channel].DST = e->dst;

    edma3ccRegs->PARAMSET[e->channel].A_B_CNT =
        CSL_FMK(EDMA3CC_A_B_CNT_ACNT, e->nbytes) |
        CSL_FMK(EDMA3CC_A_B_CNT_BCNT, 1);

    EDMA_init_repeat(e);
}

void EDMA_block_move(EDMA * e)
{
    edma3ccRegs->ECR |= 1 << (e->channel);

    edma3ccRegs->PARAMSET[e->channel].A_B_CNT =
        CSL_FMK(EDMA3CC_A_B_CNT_ACNT, e->nbytes) |
        CSL_FMK(EDMA3CC_A_B_CNT_BCNT, 1);

    edma3ccRegs->ESR |= 1 << (e->channel);
}

void test_edma_sdram()
{
    SDRAM_F32(0) = 0;
    SDRAM_F32(1) = 0;
    SDRAM_F32(2) = 0;
    sdram_buf[0] = 3.14f;
    sdram_buf[1] = 3.14f * 2;
    sdram_buf[2] = 3.14f * 3;
    EDMA_clear_completed(&edma_mem);
    EDMA_init_block_move(&edma_mem, (Uint32)sdram_buf,
            SDRAM_BASE, sizeof(sdram_buf));
    EDMA_block_move(&edma_mem);
    while(!EDMA_is_completed(&edma_mem)){
    }
}



Here is the CMD file:

MEMORY
{
    ...
    DSPL2RAM     o = 0x00804000  l = 0x0003C000     /* 256kB L2 Internal RAM */
    SHRAM        o = 0x80000000  l = 0x00020000     /* 128kB Shared RAM */                   
    ...
}                                                                       

SECTIONS
{
    ...
    .far           >  DSPL2RAM
    .sdram_buf     >  SHRAM
    ...
}



It works when I put sdram_buf to SHRAM, but if I comment out the #param DATA_SECTION line, sdram_buf is
put in to .far section(DSPL2RAM) and it don't work. All the data in SDRAM are zero.

  • Hi
    Please change your linker command file L2 address from
    DSPL2RAM o = 0x00804000 l = 0x0003C000 /* 256kB L2
    to
    DSPL2RAM o = 0x11804000 l = 0x0003C000 /* 256kB L2

    You will find several posts global vs local addressing concept. EDMA needs global address for L2 memory ( please also refer to the datasheet for memory map view from different masters in the system including EDMA)
    Regards
    Mukul