Is there a PRU in the 6747 and the L137? thanks, Chris
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Is there a PRU in the 6747 and the L137? thanks, Chris
You're a funny guy. :) Did you end that answer with a sly wink and smile? Remember the old joke about a rock being the most advanced computing device ever made, it just has poor I/O?
Are you saying that the PRU silicon is in there but it's useless since it wasn't bonded to any I/O pins? Or (hopefully) can it be muxed out somehow so I can use it?
If the PRU isn't useable on the 6747/L137, then I would normally consider jumping immediately to the 6748/L138 but I'm concerned about the loss of system performance by dropping from an x32 SDRAM bus to a x16 one. Theoretically (please confirm), by changing to DDR2 and the x16 bus, I should have the same capability; however, the negative is that my routing/SI complexity is SIGNIFICANTLY increased by DDR2. Could you comment on memory performance tradeoffs between the 6747 and 6748?
thanks, Chris
The PRU doesn't have as much flexibility without the I/O but it is far from useless. For example, the UART implementation uses the McASP peripheral for the I/O and serializers, while the PRU does the job of the controller. This can implement up to 8 additional UARTs on the device. Another major use would be for a custom DMA controller for specialized memory transfers. Other uses would be custom timers, clock gating the ARM/DSP for power savings, and offloading some processing tasks from the ARM/DSP. What were you planning on implementing in the PRU for your design?
The DDR2 on the L138 will give you more performance as it can run up to 150MHz as opposed to 133MHz for the SDRAM on the L137(the benefit of double data rate is canceled out by having only half the data width). Additionally for larger memory sizes, DDR can be cheaper than SDRAM. Finally the L138 can address up to 512MB of DDR, while the L137 can address only 256MB of SDRAM.
As for the DDR routing complexity, we have made it relatively easy by providing pretty restrictive layout rules to follow. No timing analysis would have to be done as long as the board layout complies to our spec. If you send the board files we will even check it along the way for you to make sure the DDR routing looks good. We can also provide some example routes to give some guidance.
Jeff