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AM3352BZCEA60 DDR3 IS43TR16256AL-15HBL crash after kernel paging init

while trying to boot AM3352BZCEA60 DDR3 IS43TR16256AL-15HBL one our custom board. we are facing issue in bootup

we used
u-boot from arago repository
arago-project.org/.../

And kernel from that is latest supplied by through beaglebone Angstrom website. kernel 4.1.4

U-Boot# bootm 80200000 - 88000000
## Booting kernel from Legacy Image at 80200000 ...
   Image Name:   Linux-4.1.4
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    7452192 Bytes = 7.1 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
   Loading Kernel Image ... OK
OK
   Loading Device Tree to 9fe1c000, end 9fe2d2e2 ... OK

Starting kernel ...



FILE arch/arm/kernel/setup.c function setup_arch parse_early_param() done

FILE arch/arm/kernel/setup.c function setup_arch  After paging_init(mdesc); function call

FILE arch/arm/kernel/setup.c function setup_arch  unflatten_device_tree() before;

No response from device after this print

We have modified slightly in u-boot according to our DDR3L values

arago-u-boot$ vim  arch/arm/include/asm/arch-am33xx/ddr_defs.h settings below

/* Micron MT41J128M16JT-125 */
#define DDR3_EMIF_READ_LATENCY  0x100006        /* Enable Dynamic Power Down */
#define DDR3_EMIF_TIM1          0x0888A39B
#define DDR3_EMIF_TIM2          0x26337FDA
#define DDR3_EMIF_TIM3          0x501F830F
#define DDR3_EMIF_SDCFG         0x61C04B32
#define DDR3_EMIF_SDREF         0x0000093B
#define DDR3_ZQ_CFG             0x50074BE4
#define DDR3_DLL_LOCK_DIFF      0x1
#define DDR3_RATIO              0x40
#define DDR3_INVERT_CLKOUT      0x1
#define DDR3_RD_DQS             0x3B
#define DDR3_WR_DQS             0x85
#define DDR3_PHY_WR_DATA        0xC1
#define DDR3_PHY_FIFO_WE        0x100
#define DDR3_IOCTRL_VALUE       0x18B

/* Micron ???? on 1.5 and later EVMs */
#define DDR3_EMIF_TIM2_EVM      0x26517FDA
#define DDR3_EMIF_TIM3_EVM      0x501F851F
#define DDR3_RD_DQS_EVM         0x3A
#define DDR3_WR_DQS_EVM         0x0CD
#define DDR3_PHY_FIFO_WE_EVM    0x10B
#define DDR3_PHY_WR_DATA_EVM    0x106

We can see u-boot boots up after loading the kernel and after paging initialization the kernel crashed in unflatten_device_tree() before; function


 

  • Hi,

    You must configure your DDR memory first, following these guides:
    processors.wiki.ti.com/.../AM335x_EMIF_Configuration_tips
    processors.wiki.ti.com/.../AM335x_DDR_PHY_register_configuration_for_DDR3_using_Software_Leveling

    Please note that this forum supports only the TI distributed Linux SDK. We do not support the Angstrom build.
  • HI Biser,

    Thanks for the response.

    We tried using DenX Uboot and Linux () based on reference from page.

    We have already referred to the EMIF configuration doc and DDR SW Leveling docs to find out the optimized SW leveling values. But after execution of the test through CCS, we receive the resultant parameters as 0x00.

    [CortxA8]

    Enter the PHY_INVERT_CLKOUT value (0 or 1) from the spreadsheet

    1

    Enter the Seed RD_DQS_SLAVE_RATIO Value in Hex to search the RD DQS Ratio Window

    40

    Enter the Seed FIFO_WE_SLAVE_RATIO Value in Hex to search the RD DQS Gate Window

    E7

    Enter the Seed WR_DQS_SLAVE_RATIO Write DQS Ratio Value in Hex to search the Write DQS Ratio Window

    7F

    ***************************************************************

    The Slave Ratio Search Program Values are...

    ***************************************************************

    PARAMETER                       MAX  |  MIN  | OPTIMUM |  RANGE

    ***************************************************************

    DATA_PHY_RD_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_FIFO_WE_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DATA_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    ***************************************************************

    rd_dqs_range = 0

    fifo_we_range = 0

    wr_dqs_range = 0

    wr_data_range = 0

    Optimal values have been found!!

    ***************************************************************

    The Slave Ratio Search Program Values are...

    ***************************************************************

    PARAMETER                       MAX  |  MIN  | OPTIMUM |  RANGE

    ***************************************************************

    DATA_PHY_RD_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_FIFO_WE_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DATA_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    ***************************************************************

    END OF TEST

    -----------

    Also, we implemented the DDR configuration to our u-boot source from our RatioSeed Excel sheet (non-optimised paramters).

    But, during booting of kernel we find some Slab corruption error. Please find below the logs from kernel boot-up:

    U-Boot# boot
    SD/MMC found on device 0
    reading uEnv.txt

    ** Unable to read "uEnv.txt" from mmc 0:1 **
    reading uImage

    2798880 bytes read
    Booting from mmc ...
    ## Error: "bootargs_defaults" not defined
    ## Booting kernel from Legacy Image at 80007fc0 ...
    Image Name: Linux-3.1.0
    Image Type: ARM Linux Kernel Image (uncompressed)
    Data Size: 2798816 Bytes = 2.7 MiB
    Load Address: 80008000
    Entry Point: 80008000
    Verifying Checksum ... OK
    XIP Kernel Image ... OK
    OK

    Starting kernel ...

    Uncompressing Linux... done, booting the kernel.
    [ 0.000000] Linux version 3.1.0 (root@srinivas) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #9 Tue Jan 19 18:36:45 IST 2016
    [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
    [ 0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
    [ 0.000000] Machine: am335xevm
    [ 0.000000] bootconsole [earlycon0] enabled
    [ 0.000000] Memory policy: ECC disabled, Data cache writeback
    am335x_evm_map_ioam335x_init_early[ 0.000000] AM335X ES1.0 (neon )
    [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 129920
    [ 0.000000] Kernel command line: mem=512M, earlyprintk console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext3 rootwait ip=none
    [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
    [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
    [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
    [ 0.000000] Memory: 512MB = 512MB total
    [ 0.000000] Memory: 513416k/513416k available, 10872k reserved, 0K highmem
    [ 0.000000] Virtual kernel memory layout:
    [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
    [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
    [ 0.000000] DMA : 0xffc00000 - 0xffe00000 ( 2 MB)
    [ 0.000000] vmalloc : 0xe0800000 - 0xf8000000 ( 376 MB)
    [ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
    [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
    [ 0.000000] .text : 0xc0008000 - 0xc04f8000 (5056 kB)
    [ 0.000000] .init : 0xc04f8000 - 0xc0534000 ( 240 kB)
    [ 0.000000] .data : 0xc0534000 - 0xc0583650 ( 318 kB)
    [ 0.000000] .bss : 0xc0583674 - 0xc05b02c8 ( 180 kB)
    [ 0.000000] Slab corruption: size-32 start=df801140, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Next obj: start=df801180, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801180, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801140, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df8011c0, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-64 start=df802140, len=64
    [ 0.000000] 030: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Next obj: start=df802180, len=64
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df8011c0, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801180, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801200, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801200, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df8011c0, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801240, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801240, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801200, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801280, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801280, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801240, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df8012c0, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df8012c0, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801280, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801300, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801300, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df8012c0, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801340, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801340, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801300, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df801380, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Slab corruption: size-32 start=df801380, len=32
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] Prev obj: start=df801340, len=32
    [ 0.000000] 000: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00
    [ 0.000000] 010: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a
    [ 0.000000] Next obj: start=df8013c0, len=32
    [ 0.000000] 000: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b
    [ 0.000000] 010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b

     

    Also, we experimented with adding extra CFLAGS to kernel "-mno-unaligned-access" while building. But, that doesn't seem to be helping our issue.

    Also, we have highlighted the Kernel version and the toolchain info in our bootlog.

    Linux version 3.1.0 (root@srinivas) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) )

     

    Kindly suggest us on what might be wrong with our configuration in kernel/u-boot.

    Thanks,

    Nilesh/Upatro

  • I strongly recommend you use the latest Linux SDK, which can be downloaded from here: software-dl.ti.com/.../index_FDS.html The kernel version you use is not supported by TI.
  • First, I agree with Biser's comments that you would be well-advised to migrate to a newer version of Linux and u-boot.  There are many MANY issues that have been solved in the years since those were released, and inevitably you will be re-solving all those same issues unless you move to something newer.

    Umakanta Patro1 said:

    Enter the PHY_INVERT_CLKOUT value (0 or 1) from the spreadsheet

    1

    Usually in designs using INVERT_CLKOUT=1 you need to increase the value of DDR_PHY_CTRL_1 (@0x4C0000E4) REG_READ_LATENCY.  That might be your issue.

    I was also going to tell you to be sure and run the software leveling though there are some bugs in those older u-boot versions which might make it not work right.  Please update to a newer version.

  • Thanks Brad and Biser for your suggestions.

    We are trying to download TI AM335 SDK and build and use the U-boot and kernel from it for our board.

    Meanwhile, If you could help us in understanding what is wrong with our process/calculation because of which we find 0x00 as the optimized values for SW leveling on our board, that would be helpful.  Also, we would like to know whether 0x00 as optimized value is a valid value to be used in our GEL file and U-boot source.

    We are attaching the log from our SW leveling again:

    [CortxA8]

    Enter the PHY_INVERT_CLKOUT value (0 or 1) from the spreadsheet

    1

    Enter the Seed RD_DQS_SLAVE_RATIO Value in Hex to search the RD DQS Ratio Window

    40

    Enter the Seed FIFO_WE_SLAVE_RATIO Value in Hex to search the RD DQS Gate Window

    E7

    Enter the Seed WR_DQS_SLAVE_RATIO Write DQS Ratio Value in Hex to search the Write DQS Ratio Window

    7F

    ***************************************************************

    The Slave Ratio Search Program Values are...

    ***************************************************************

    PARAMETER                       MAX  |  MIN  | OPTIMUM |  RANGE

    ***************************************************************

    DATA_PHY_RD_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_FIFO_WE_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DATA_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    ***************************************************************

    rd_dqs_range = 0

    fifo_we_range = 0

    wr_dqs_range = 0

    wr_data_range = 0

    Optimal values have been found!!

    ***************************************************************

    The Slave Ratio Search Program Values are...

    ***************************************************************

    PARAMETER                       MAX  |  MIN  | OPTIMUM |  RANGE

    ***************************************************************

    DATA_PHY_RD_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_FIFO_WE_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DQS_SLAVE_RATIO    0x000 | 0x000 |  0x000  | 0x000

    DATA_PHY_WR_DATA_SLAVE_RATIO   0x000 | 0x000 |  0x000  | 0x000

    ***************************************************************

    END OF TEST

    -----------

    Thanks,

    Umakanta

  • Did you increase REG_READ_LATENCY per my previous reply?