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Need Help for XFI Serdes Link error

Sebastian Suesens
Intellectual 645 points


Hello,


we have a customer board which use a 10G Phy 88X3120 by Marvell.

The Phy is connect with the kystone 2 via the XFI Interface 0 from the keystone 2.

Following behaviour:

The keystone 2 start up and we get the message that the "XGE PCSR Linked Lane 0" if this message shown the 10G connection worked.

But sometimes we don't get this message (all 300 reboots). After debuging we find out that the "keystone_xgepcsr.c" driver on function k2serdes_check_link_status a link error detect. The error is stored in value blk_errs. The value can be 0xFF or 0x18.

A Reset of the serdes more than one after a error has no influence to get a successful link. After a reboot the 10G connection worked again.

I can't find information on the data sheet "SPRUHJ5—February2013" what this error mean. Can you help me to get more information.

To get more information about this error we did another test. We switch the 10G Phy in a PMA loopback mode, in this mode we get no serdes link error.

Do you have an idea what can be the problem?

  • 0
    TI__Guru* 81335 points

    Hi,

    I hope you are running Linux keystone 2. Please confirm.

    Please refer KeyStone II Architecture Serializer/Deserializer (SerDes) UG from below link,

    http://www.ti.com/lit/spruho3

    Thank you.

  • 0 in reply to Raja
    Intellectual 645 points
    Hello,

    yes I mean the driver under linux.
  • 0 in reply to Sebastian Suesens
    TI__Guru 50170 points
    Hi, Sebastian,
    The sympton you observed is similar to one of the issues we've seen. We only saw value being 0xff, not 0x18, and it happens intermittently after reboot. The cause is the c1/c2/cm of serdes not being configured correctly after xge lane enabled. We are working on it, and will get back to you.
    Thanks!Rex
  • 0 in reply to Rex Chang
    TI__Guru 50170 points

    Hi, Sebatian,

    Just want to give you an update. We noticed that PCSR_RX_STATUS may not have bit 30 set to 1 showing Serdes link being good. If we did a reset CDR, then the link will be up. We are verifying on a system and once it is done, I'll post the patch.

    Rex

  • 0 in reply to Rex Chang
    Intellectual 645 points 
    Hello Rex,

now I update my system to kernel 3.10.72 and use your patch with no success.

Sometimes, when I send a ping form the customer board, I can't get a ping.

The host get the ARP but the customer board with the keystone II get no ARP Reply.

I use the command devmem2 0x02f0060c to read the serdes status and get following value back:

When success: 0x4000 0000
When error:   0x201D 0000

The error stay even if I use your commands to reset the CDR.
Only a repeated re-pluging of the lan cable helps.
  • 0 in reply to Sebastian Suesens
    TI__Guru 50170 points

    Hi, Sebastian,

    I can't find info on your ping setup. Do you ping between 2 custom boards or a custom board and a PC host? We see issue of bit 30 not set in PCSR_RX_STATUS on the EVM booting up first when connecting 2 TI EVMs back-to-back through RTM connector. Issuing the reset CDR resolve on the first EVm resolved the issue in our setup. Could you send me the logs when ping failed. I'd like to take  a look at the logs with the commands in the following order. If the ping is done between 2 boards, I'd like to have logs on both and please mark which board is the one coming up first.

    1. PCSR_RX_STATUS  (The 1st board should show bit 30 not set, but 2nd board would have it set)

    2. Reset CDR command 

    3. PCSR_RX_STATUS (Both boards should show bit 30 set. If any one doesn't, the ping will fail)

    4. ping

    Thanks!

    Rex

  • 0 in reply to Rex Chang
    Intellectual 645 points

    Hello Rex,

    I will describe you my test setup.

    1. I have a customer board with a keystone II. The Board use a 10G copper Phy  88x3120 by Marvell on the XFI Port 0 .

    2. I have a host PC with a PCIe 10G card called 10 Gigabit AT2 Server Adapter by Intel.

    3. PC and customer Board are connected with a CAT7 plus cable.

    I make several tests.

    1. I use your patch for kernel 3.10.72 but it doesn't work.
    2.  I use your patch for kernel 3.10.62 with success. However I have to reset the SerDes several times . I write a shell script which counts the resets when the PCSR_RX_STATUS is zero. I upload the Serdes-Reset script and the reset retry results. 4377.SerDes-Test.tar.gz

    Note:

    I detected when the PCSR_RX_STATUS is zero that the 10G Phy on kernel 3.10.72 has no link, but on kernel 3.10.62 the phy get a link.

    Best regards

    Sebastian