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Hyperlink lane swap

Senthil Kumar
Intellectual 505 points
Other Parts Discussed in Thread: TMS320C6678

Hi,

We are designing a board using two tms320c6678 processor. As hyperlink serdes supports automatic lane detection and correction, we planned to connect the hyperlink lane as given in the diagram. Is this correct.

Regards,

Senthil Kumar.G

  • 0
    TI__Mastermind 43660 points
    Senthil Kumar,

    Yes, the HyperLink module will detect the lane swapping and the pair inversion automatically and correct for these changes. There is no need of any configuration. Lane swapping should only be used if two or four lanes are used. For example, you can't define a one lane interface and then use transmit lane 1 connected to receive lane 0. Lane 0 transmit and receive should be used for single lane connections at both ends.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Intellectual 505 points
    Srinivasan,

    Yes, lane swapping and pair inversion detection and correction happens in hyperlink automatically. But in our design, TX0/TX1/TX2/TX3 pairs of DSP1 are connected to RX0/RX1/RX2/RX3 pairs of DSP2 and RX0/RX1/RX2/RX3 of DSP1 is connected to TX2/TX1/TX3/TX0 of DSP2. Here TX pairs of DSP1 is connected without swap to RX pairs of DSP2 but RX pairs of DSP1 is connected with swap to TX pairs of DSP2. Is this swap correct.
    Lane swap means both TXRX has to involved in swap but in our case we swapped only RX pairs of DSP1. Will this change can be corrected by hyperlink serdes.
    Please verify the swap in the diagram is correct.

    Regards,
    Senthil Kumar.G
  • 0 in reply to Senthil Kumar
    TI__Mastermind 43660 points
    Senthil Kumar,

    Based on my understanding of the interface, this should work fine. For multilane connections the only real limitation is that the P and N of a pair must be kept together, i.e., for example DSP1 RX3p/n must be connected to TX0p/n or n/p. You can’t connect RX3p to TX3p and RX3n to TX0n. The p/n pairs must be kept together and connected to another p/n pair.

    Regards,
    Senthil