AM437x QSPI chip-select active period with access through the memory-mapped port

Daisuke Maeda

Guru 20205 points

Other Parts Discussed in Thread: SYSBIOS

A read/write sequence by SFI translator is described in TRM (SPRUHL7D) as the following.

"
A read sequence is converted into the following actions:

1. SPI chip-select goes active.
2. Read command byte is issued.
3. 1 to 4 address bytes, which correspond to the first address supplied, are issued.
4. 0 to 3 dummy bytes are issued, if “fast read” is supported.
5. Data bytes are read from the external SPI flash memory.
6. SPI chip-select goes inactive.

For linear addressing mode, action 5 is repeated until the byte count to be transferred reaches zero.

A write sequence is identical to a read sequence, except that a write sequence does not use dummy
bytes.
"

A chip-select active period is extended until the byte count to be transferred reaches zero.

What is "the byte count"?

How is the initial value of "the byte count" configured for access with CPU, or EDMA?

Best regards,

Daisuke

over 9 years ago

0 Biser Gatchev-XID over 9 years ago

TI__Guru**** 393215 points

Hi,

"Byte count" is the number of bytes to be transferred. This would be set in the FLEN bitfield of QSPI_CMD_REG register.

0 Daisuke Maeda over 9 years ago in reply to Biser Gatchev-XID

Guru 20205 points

Hi Biser-san,

Thank you for your reply.

In the access through the memory-mapped port:

Does the value to be set to the FLEN bit field indicate the maximum number of bytes that can be transferred?

When the number of bytes to be set to the FLEN bit field is less than the number of bytes to be transferred in a load/store instruction or an EDMA burst transfer, is the transfer divided into multiple times?

When the number of bytes to be set to the FLEN bit field is more than the number of bytes to be transferred in a load/store instruction or an EDMA burst transfer, does the chip-select go inactive when the transfer is completed even if the data bytes of the number of bytes to be set to the FLEN bit field are not transferred?

Does the WLEN (word length) bit field of QSPI_CMD_REG register affect the access?

Best regards,

Daisuke

0 Daisuke Maeda over 9 years ago in reply to Biser Gatchev-XID

Guru 20205 points

Hi Biser-san,

I checked the source code of QSPI library in Sitara SYSBIOS Industrial SDK. The QSPI_CMD_REG register seems to be not used for the access through the memory-mapped port.

http://downloads.ti.com/sitara_indus/esd/SYSBIOSSDK-IND-SITARA/latest/index_FDS.html

I think that the access through the memory-mapped port acts like the access to NOR flash through GPMC data path, that the chip-select is held active during the transfer in a load/store instruction or an EDMA burst transfer.

Is my thought correct?

Best regards,

Daisuke

0 Biser Gatchev-XID over 9 years ago in reply to Daisuke Maeda

TI__Guru**** 393215 points

Yes.

0 Daisuke Maeda over 9 years ago in reply to Biser Gatchev-XID

Guru 20205 points

Hi Biser-san,

Thank you for your reply.

Best regards,

Daisuke

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AM437x QSPI chip-select active period with access through the memory-mapped port