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DM8148 evm mcasp2 clocking

Hi,

On the evm since the codec is master and 8148 is the slave is AHCLKX clock source is AUDCLKIN0 ?

Thanks,

Mike

  • Hi Mike,

    No, in DM814x TI EVM McASP AHCLKX clock source is not AUDCLKIN0. McASP AHCLKX clock source is internal, it is the auxclk, AHCLKXCTL[15] HCLKXM = 0

    McASP slave means that McASP receive bit clock and frame sync from the codec. The high frequency clock is still internal.

    BR
    Pavel
  • Hi Pavel,

    Sorry for the delayed response. We are not using the hight speed clocks on our custom evm, what changes are necessary to get it working ?

    ACLKX--------->CLKXM(0)------->CLKXP(0)------>>XCLK

    Thanks,

    Mike

  • Mike,

    mike A said:
    We are not using the hight speed clocks on our custom evm

    I assume that "hight speed clocks" means McASP2 transmit high-frequency clock AHCLKX.

    The same at the DM814x TI EVM, McASP2 AHCLKX (pin H1) is not used nor as input (to produce the bit clock ACLKX from it) neither as output (to serve as a reference clock for other components in the system). May be I was not clear enough in my previous post, in DM814x TI EVM, ACLKX bit clock is sourced from the external codec, as codec is the master. The ACLKX bit clock is not generated nor from AHCLKX pin, neither internally.

    BR
    Pavel