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Sitara am335x AVSBus implementation

Kans

Prodigy 70 points

How can I implement a AVSBus in Sitara am335x processor?

over 9 years ago

0 Biser Gatchev-XID over 9 years ago

TI__Guru**** 393215 points

Can you please describe in more detail what you want to do? Control an external device or the processor PMIC? I suppose this is related to your other post: e2e.ti.com/.../486428 Comments I made there apply for this too.

0 Kans over 9 years ago in reply to Biser Gatchev-XID

Prodigy 70 points

Well.. I need to implement an AVSBus master running at 50MHz to control an external device. And, PMBus is similiar to I2C whereas AVSBus is similiar to SPI interface..

0 Biser Gatchev-XID over 9 years ago in reply to Kans

TI__Guru**** 393215 points

AM335X does have 2 SPI peripherals that will most likely fulfill the hardware requirements, but again there is no ready software solution for this.

0 Biser Gatchev-XID over 9 years ago in reply to Biser Gatchev-XID

TI__Guru**** 393215 points

A quick note: AM335X SPI master can provide max. 48MHz clock.

0 Kans over 9 years ago in reply to Biser Gatchev-XID

Prodigy 70 points

Thank You.. But I need 64 bit read write commands.. But SPI in am335x supports only upto 32 bits..

0 Biser Gatchev-XID over 9 years ago in reply to Kans

TI__Guru**** 393215 points

Yes, this is true. So it won't work for you.

0 Kans over 9 years ago in reply to Biser Gatchev-XID

Prodigy 70 points

Yes.. Thats what I thought.. Anyways... Thank You..

0 Brad Griffis over 9 years ago in reply to Kans

TI__Guru*** 125430 points

Kans said:
Thank You.. But I need 64 bit read write commands.. But SPI in am335x supports only upto 32 bits..

When viewing these transactions on the pins, you should be able to internally perform two 32-bit writes that look like a single 64-bit transaction.