We are trying to use the combination of Linux, power management, and low power domains on a Sitara. It isn't working too well when we use OPP50 for the core PLL at 300 MHz and all idle states enabled. We're getting resets from the watchdog under stress.
Has anyone tried TI RTOS with OPP50 levels? We need the power down to have a product, and only OPP50 levels give us low enough values. We are aware of the limitations of the chip in that mode.
We've never made dynamic power and frequency work in Linux. Does it work out-of-the-box in TI RTOS? How low have people made the power in TI RTOS?
