Other Parts Discussed in Thread: TMS320C6748
I’m questioning the accuracy of the information contained in Table 3-9. DDR2 Controller (DDR2) Terminal Functions contained in the SPRS590A – TMS320C6748Fixed/Floating Point DSP Data Sheet.
The table in the data sheet indicates that the active low signals DDR_WE, DDR_RAS, DDR_CAS, and DDR_CS are all internally pulled down. Does the TMS320C6748 device really connect these active low signals to internal pull down resistors?
Also there is an associated footnote (Table 3-9; footnote 2) with regards to the pullup/pulldown resistor configuration.
(2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module.
The footnote mentions that these are configurable but the table does not identify the specific pin group associated with the DDR2/mDDR pins.
What guidance can TI provide for us to follow with regards to these active low signals DDR_WE, DDR_RAS, DDR_CAS, and DDR_CS and the internal pullup/pulldown resistor pin configuration?