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AM4/AM5: PRU implementation of I2C master

Hi,

We would need a number of additional I2C masters on an SOC with PRU.

Are there any existing implementation of I2C on the PRU?

Is it feasible (assuming 400kHz) and the right open-collector logic externally to implement I2C on the PRUSS, e.g AM4 or AM5?

Thanks!

--Gunter