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Malfunction in C6748

pilhwan doe
Prodigy 125 points

Hi, I have a question again.

I don't know about this operation at c6748.

Use the CCS4.x and XDS100 V2. And not use DIOS.

 

Problem is this.

EEP_SPI_Temp = EEP_Write_Step_Cnt % 0x3;    <-- breakpoint here.

 

Variation value are

 

EEP_Write_Step_Cnt = 1,

EEP_SPI_Temp = 0.

 

Three red boxes are in above figure. Boxes are below;

I had a "Step Into". Then I had a below result;

 

The content in red box of above figure is below

 I expected a 0x1(1). But result is 0x64003000(1677733888).

 

I can't find the reason of malfunction. 

Clink this my project file.

Waiting for yours answer. Thank you.

 

  • 0
    TI__Mastermind 18130 points

    I cannot seem to reproduce this failure. Would you please let me know what version of the compiler (Code Generation Tools) you are using?

  • 0 in reply to TimHarron
    Prodigy 125 points

    Sorry, I'm late.

    Code Generation tool is v6.1.14.

    Do you need any other information?

    Thanks Tim.

  • 0 in reply to pilhwan doe
    TI__Guru*** 125430 points

    Looking at your interrupt vector table I believe you have some issues there.  Here's a snippet from your intvecs.asm:

    ; This is a macro that instantiates one entry in the interrupt service table.
    VEC_ENTRY .macro addr
        STW   B0,*--B15
        MVKL  addr,B0
        MVKH  addr,B0
        B     B0
        LDW   *B15++,B0
        NOP   2
        NOP
        NOP
       .endm

    Issues I see

    1. Your stack convention is not correct.  The stack pointer B15 points to the next available location.  in other words you first instruction (STW) should be doing a post-decrement and the corresponding LDW should be doing a pre-increment.
    2. It is required that the stack always be double-word aligned.  In other words you need to post-decrement 2 words and pre-increment 2 words in order to maintain this convention.  If you do not then STDW and LDDW instructions will not work properly because they will always operate on a double-word boundary.

    Here is the macro from DSP/BIOS for instantiating interrupt vectors:

                      stw b0,*b15--[2]        ; temp save b0 on stack
                        mvkl :vector:,b0        ; load destination address to b0
                        mvkh :vector:,b0
                        b b0                    ; start branch to destination
                        ldw *++b15[2],b0        ; restore b0 register
                        nop 2                   ; fill 2 of b0 restore delay slots
                        nop                     ; fill delay slot, pad packet
                        nop                     ; fill delay slot, pad packet

    As you can see, this addresses my two issues I noted above. 

    One other major issue:

    In your ISRs I see that you are re-enabling interrupts (CSR |=1 ) right at the end of the ISR.  You should not do that!  The return from the interrupt will automatically re-enable interrupts.  By putting that as the last instruction you are enabling nested interrupts, but you have not preserved the necessary registers and so things will get messed up.

     

  • 0 in reply to Brad Griffis
    Prodigy 125 points

    Hi, Brad.

    Thank you for your advice. I fixed code about your advice.

     I had fix the intvecs.asm like this

    ; This is a macro that instantiates one entry in the interrupt service table.
    VEC_ENTRY .macro addr
        STW   B0,*B15--[2]
        MVKL  :addr:,B0
        MVKH  :addr:,B0
        B     B0
        LDW   *++B15[2],B0
        NOP   2
        NOP
        NOP
       .endm

    I remove (CSR |= 0x1) and attach a "asm("B IRP");" at the end of ISR. That is correct?

    consequently, problem is solved. thanks Brad.

  • 0 in reply to pilhwan doe
    TI__Guru*** 125430 points

    One last critical thing...  Remove the asm("B IRP") statement.  Instead you need to define your function like this:

    interrupt void TIMER0_TINT12_isr(void)
    {

     

    }

    That will cause it to do the B IRP at the end instead of the usual return.  It will also have it preserve some additional registers so it's very important to make this change.  In fact, it's lucky your code works without it!

  • 0 in reply to Brad Griffis
    Prodigy 125 points

    Oh, I never considered about that. :o

    Thanks Brad!

  • 0 in reply to pilhwan doe
    Intellectual 370 points

    Hello

     

    Thanks to all who have posted in this thread. For the last few days I was stuck at running an ISR which needs to be fired repeatedly (both with single interrupt and combined interrupt ,not nested) on a 6472 board . Discussion in this thread helped me  out. By the way, I was  trying to do the whole thing without using DSP BIOS.

     

    Regards,

    AC